llvm-6502/test/CodeGen
Tim Northover bbdf1e0432 AArch64: stop trying to take control of all UnknownArch triples.
This short-circuited our error reporting for incorrectly specified
target triples (you'd get AArch64 code instead).

Should fix PR20567.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215191 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-08 08:27:44 +00:00
..
AArch64 AArch64: stop trying to take control of all UnknownArch triples. 2014-08-08 08:27:44 +00:00
ARM Make these regexes stricter by disallowing any additional characters in the output. 2014-08-07 23:04:07 +00:00
CPP IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
Generic Use "weak alias" instead of "alias weak" 2014-07-30 22:51:54 +00:00
Hexagon DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range. 2014-08-06 00:21:25 +00:00
Inputs
Mips fix materialization of one bit constants and global values which are accessed through 2014-08-07 22:09:01 +00:00
MSP430 Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
NVPTX [NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types 2014-07-23 20:23:49 +00:00
PowerPC [PowerPC] Swap arguments and adjust shift count for vsldoi on little endian 2014-08-05 20:47:25 +00:00
R600 R600: Cleanup fadd and fsub tests 2014-08-06 20:27:55 +00:00
SPARC IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
SystemZ IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
Thumb [ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly 2014-08-02 05:40:40 +00:00
Thumb2 ARM: do not generate BLX instructions on Cortex-M CPUs. 2014-08-06 11:13:14 +00:00
X86 [pr19635] Revert most of r170537, and add new testcase. 2014-08-08 08:21:19 +00:00
XCore llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32. 2014-07-04 11:58:03 +00:00