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https://github.com/c64scene-ar/llvm-6502.git
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eb38ebf15c
the alignment allows. Fixed a bug where we didn't use a vector load/store for PR5626. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94338 91177308-0d34-0410-b5e6-96231b3b80d8
47 lines
1.6 KiB
LLVM
47 lines
1.6 KiB
LLVM
; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
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; CHECK: pextrd
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; CHECK: pextrd
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; CHECK: movd
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; CHECK: movaps
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; bitcast v14i16 to v7i32
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define void @convert(<7 x i32>* %dst, <14 x i16>* %src) nounwind {
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entry:
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%dst.addr = alloca <7 x i32>* ; <<7 x i32>**> [#uses=2]
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%src.addr = alloca <14 x i16>* ; <<14 x i16>**> [#uses=2]
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%i = alloca i32, align 4 ; <i32*> [#uses=6]
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store <7 x i32>* %dst, <7 x i32>** %dst.addr
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store <14 x i16>* %src, <14 x i16>** %src.addr
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store i32 0, i32* %i
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br label %forcond
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forcond: ; preds = %forinc, %entry
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%tmp = load i32* %i ; <i32> [#uses=1]
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%cmp = icmp slt i32 %tmp, 4 ; <i1> [#uses=1]
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br i1 %cmp, label %forbody, label %afterfor
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forbody: ; preds = %forcond
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%tmp1 = load i32* %i ; <i32> [#uses=1]
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%tmp2 = load <7 x i32>** %dst.addr ; <<2 x i32>*> [#uses=1]
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%arrayidx = getelementptr <7 x i32>* %tmp2, i32 %tmp1 ; <<7 x i32>*> [#uses=1]
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%tmp3 = load i32* %i ; <i32> [#uses=1]
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%tmp4 = load <14 x i16>** %src.addr ; <<4 x i16>*> [#uses=1]
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%arrayidx5 = getelementptr <14 x i16>* %tmp4, i32 %tmp3 ; <<4 x i16>*> [#uses=1]
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%tmp6 = load <14 x i16>* %arrayidx5 ; <<4 x i16>> [#uses=1]
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%add = add <14 x i16> %tmp6, < i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1 > ; <<4 x i16>> [#uses=1]
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%conv = bitcast <14 x i16> %add to <7 x i32> ; <<7 x i32>> [#uses=1]
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store <7 x i32> %conv, <7 x i32>* %arrayidx
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br label %forinc
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forinc: ; preds = %forbody
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%tmp7 = load i32* %i ; <i32> [#uses=1]
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%inc = add i32 %tmp7, 1 ; <i32> [#uses=1]
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store i32 %inc, i32* %i
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br label %forcond
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afterfor: ; preds = %forcond
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ret void
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}
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