llvm-6502/test/CodeGen
Matt Arsenault 16fc5e9c0f R600/SI: Remove v_sub_f64 pseudo
The expansion code does the same thing. Since
the operands were not defined with the correct
types, this has the side effect of fixing operand
folding since the expanded pseudo would never use
SGPRs or inline immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230072 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-20 22:10:45 +00:00
..
AArch64
ARM [ARM] Re-re-apply VLD1/VST1 base-update combine. 2015-02-19 23:52:41 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips Reversed revision 229706. The reason is regression, which is caused by the 2015-02-20 20:26:52 +00:00
MSP430
NVPTX
PowerPC I incorrectly marked the VORC instruction as isCommutable when I added it. 2015-02-20 15:54:58 +00:00
R600 R600/SI: Remove v_sub_f64 pseudo 2015-02-20 22:10:45 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86 [X86][FastIsel] Teach how to select float-half conversion intrinsics. 2015-02-20 19:37:14 +00:00
XCore Revert r229944: EH: Prune unreachable resume instructions during Dwarf EH preparation 2015-02-20 02:15:36 +00:00