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3ef1c8759a
take multiple cycles to decode. For the current if-converter clients (actually only ARM), the instructions that are predicated on false are not nops. They would still take machine cycles to decode. Micro-coded instructions such as LDM / STM can potentially take multiple cycles to decode. If-converter should take treat them as non-micro-coded simple instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8
90 lines
2.3 KiB
C++
90 lines
2.3 KiB
C++
//===-- SPUTargetMachine.h - Define TargetMachine for Cell SPU ----*- C++ -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the CellSPU-specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SPU_TARGETMACHINE_H
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#define SPU_TARGETMACHINE_H
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#include "SPUSubtarget.h"
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#include "SPUInstrInfo.h"
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#include "SPUISelLowering.h"
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#include "SPUSelectionDAGInfo.h"
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#include "SPUFrameInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetData.h"
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namespace llvm {
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class PassManager;
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class GlobalValue;
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class TargetFrameInfo;
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/// SPUTargetMachine
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///
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class SPUTargetMachine : public LLVMTargetMachine {
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SPUSubtarget Subtarget;
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const TargetData DataLayout;
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SPUInstrInfo InstrInfo;
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SPUFrameInfo FrameInfo;
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SPUTargetLowering TLInfo;
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SPUSelectionDAGInfo TSInfo;
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InstrItineraryData InstrItins;
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public:
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SPUTargetMachine(const Target &T, const std::string &TT,
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const std::string &FS);
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/// Return the subtarget implementation object
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virtual const SPUSubtarget *getSubtargetImpl() const {
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return &Subtarget;
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}
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virtual const SPUInstrInfo *getInstrInfo() const {
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return &InstrInfo;
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}
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virtual const SPUFrameInfo *getFrameInfo() const {
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return &FrameInfo;
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}
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/*!
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\note Cell SPU does not support JIT today. It could support JIT at some
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point.
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*/
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virtual TargetJITInfo *getJITInfo() {
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return NULL;
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}
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virtual const SPUTargetLowering *getTargetLowering() const {
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return &TLInfo;
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}
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virtual const SPUSelectionDAGInfo* getSelectionDAGInfo() const {
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return &TSInfo;
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}
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virtual const SPURegisterInfo *getRegisterInfo() const {
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return &InstrInfo.getRegisterInfo();
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}
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virtual const TargetData *getTargetData() const {
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return &DataLayout;
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}
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virtual const InstrItineraryData *getInstrItineraryData() const {
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return &InstrItins;
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}
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// Pass Pipeline Configuration
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virtual bool addInstSelector(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel);
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};
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} // end namespace llvm
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#endif
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