Matthias Braun ff881427ec TargetRegisterInfo: Make the concept of imprecise lane masks explicit ... LaneMasks as given by getSubRegIndexLaneMask() have a limited number of of bits, so for targets with more than 31 disjunct subregister there may be cases where: getSubReg(Reg,A) does not overlap getSubReg(Reg,B) but we still have (getSubRegIndexLaneMask(A) & getSubRegIndexLaneMask(B)) != 0. I had hoped to keep this an implementation detail of the tablegen but as my next commit shows we can avoid unnecessary imp-defs operands if we know that the lane masks in use are precise. This is in preparation to http://reviews.llvm.org/D10470. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239837 91177308-0d34-0410-b5e6-96231b3b80d8		2015-06-16 18:22:26 +00:00
..
CostTable.h	Add a overload to CostTable which allows it to infer the size of the table.	2013-08-09 19:33:32 +00:00
Target.td	[CodeGen] Introduce a FAULTING_LOAD_OP pseudo-op.	2015-06-15 18:44:08 +00:00
TargetCallingConv.h	Add missing #include and forward decl, found by modules build.	2015-05-12 21:49:03 +00:00
TargetCallingConv.td	[mips] Remove MipsCC::analyzeCallOperands in favour of CCState::AnalyzeCallOperands. NFC	2014-11-07 11:43:49 +00:00
TargetFrameLowering.h	[ShrinkWrap] Add a target hook to check whether or not	2015-05-27 06:25:48 +00:00
TargetInstrInfo.h	[TargetInstrInfo] Add new hook: AnalyzeBranchPredicate.	2015-06-15 18:44:21 +00:00
TargetIntrinsicInfo.h	Removing LLVM_DELETED_FUNCTION, as MSVC 2012 was the last reason for requiring the macro. NFC; LLVM edition.	2015-02-15 22:54:22 +00:00
TargetItinerary.td
TargetLowering.h	Add isLegalAddressingMode address space argument to TTI	2015-06-07 20:12:03 +00:00
TargetLoweringObjectFile.h	Move alignment from MCSectionData to MCSection.	2015-05-21 19:20:38 +00:00
TargetMachine.h	Replace string GNU Triples with llvm::Triple in TargetMachine::getTargetTriple(). NFC.	2015-06-16 13:15:50 +00:00
TargetOpcodes.h	[CodeGen] Introduce a FAULTING_LOAD_OP pseudo-op.	2015-06-15 18:44:08 +00:00
TargetOptions.h	Remove DisableTailCalls from TargetOptions and the code in resetTargetOptions	2015-06-09 19:07:19 +00:00
TargetRecip.h	make reciprocal estimate code generation more flexible by adding command-line options (3rd try)	2015-06-04 01:32:35 +00:00
TargetRegisterInfo.h	TargetRegisterInfo: Make the concept of imprecise lane masks explicit	2015-06-16 18:22:26 +00:00
TargetSchedule.td	Move Post RA Scheduling flag bit into SchedMachineModel	2014-07-15 22:39:58 +00:00
TargetSelectionDAG.td	Add SDNodes for umin, umax, smin and smax.	2015-05-15 09:03:15 +00:00
TargetSelectionDAGInfo.h	Removing LLVM_DELETED_FUNCTION, as MSVC 2012 was the last reason for requiring the macro. NFC; LLVM edition.	2015-02-15 22:54:22 +00:00
TargetSubtargetInfo.h	Rename TargetSubtargetInfo::enablePostMachineScheduler() to enablePostRAScheduler()	2015-06-13 03:42:16 +00:00