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The Cortex-M7 has 3 options for its FPU: none, FPv5-SP-D16 and FPv5-DP-D16. FPv5 has the same instructions as FP-ARMv8, so it can be modelled using the same target feature, and all double-precision operations are already disabled by the fp-only-sp target features. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218747 91177308-0d34-0410-b5e6-96231b3b80d8
35 lines
1.1 KiB
C++
35 lines
1.1 KiB
C++
//===-- ARMFPUName.def - List of the ARM FPU names --------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the list of the supported ARM FPU names.
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//
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//===----------------------------------------------------------------------===//
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// NOTE: NO INCLUDE GUARD DESIRED!
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#ifndef ARM_FPU_NAME
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#error "You must define ARM_FPU_NAME(NAME, ID) before including ARMFPUName.h"
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#endif
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ARM_FPU_NAME("vfp", VFP)
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ARM_FPU_NAME("vfpv2", VFPV2)
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ARM_FPU_NAME("vfpv3", VFPV3)
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ARM_FPU_NAME("vfpv3-d16", VFPV3_D16)
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ARM_FPU_NAME("vfpv4", VFPV4)
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ARM_FPU_NAME("vfpv4-d16", VFPV4_D16)
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ARM_FPU_NAME("fpv5-d16", FPV5_D16)
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ARM_FPU_NAME("fp-armv8", FP_ARMV8)
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ARM_FPU_NAME("neon", NEON)
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ARM_FPU_NAME("neon-vfpv4", NEON_VFPV4)
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ARM_FPU_NAME("neon-fp-armv8", NEON_FP_ARMV8)
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ARM_FPU_NAME("crypto-neon-fp-armv8", CRYPTO_NEON_FP_ARMV8)
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ARM_FPU_NAME("softvfp", SOFTVFP)
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#undef ARM_FPU_NAME
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