Bob Wilson f74a429816 Overhaul memory barriers in the ARM backend. Radar 8601999. ... There were a number of issues to fix up here: * The "device" argument of the llvm.memory.barrier intrinsic should be used to distinguish the "Full System" domain from the "Inner Shareable" domain. It has nothing to do with using DMB vs. DSB instructions. * The compiler should never need to emit DSB instructions. Remove the ARMISD::SYNCBARRIER node and also remove the instruction patterns for DSB. * Merge the separate DMB/DSB instructions for options only used for the disassembler with the default DMB/DSB instructions. Add the default "full system" option ARM_MB::SY to the ARM_MB::MemBOpt enum. * Add a separate ARMISD::MEMBARRIER_MCR node for subtargets that implement a data memory barrier using the MCR instruction. * Fix up encodings for these instructions (except MCR). I also updated the tests and added a few new ones to check for DMB options that were not currently being exercised. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117756 91177308-0d34-0410-b5e6-96231b3b80d8		2010-10-30 00:54:37 +00:00
..
2007-01-31-RegInfoAssert.ll
2007-02-02-JoinIntervalsCrash.ll
2007-03-06-AddR7.ll
2007-05-05-InvalidPushPop.ll	Correct bogus module triple specifications.	2010-08-30 10:48:29 +00:00
2009-06-18-ThumbCommuteMul.ll
2009-07-19-SPDecBug.ll	Remove arm_apcscc from the test files. It is the default and doing this	2010-06-17 15:18:27 +00:00
2009-07-20-TwoAddrBug.ll	Remove arm_apcscc from the test files. It is the default and doing this	2010-06-17 15:18:27 +00:00
2009-07-27-PEIAssert.ll	Remove arm_apcscc from the test files. It is the default and doing this	2010-06-17 15:18:27 +00:00
2009-08-12-ConstIslandAssert.ll	Remove arm_apcscc from the test files. It is the default and doing this	2010-06-17 15:18:27 +00:00
2009-08-12-RegInfoAssert.ll	Remove arm_apcscc from the test files. It is the default and doing this	2010-06-17 15:18:27 +00:00
2009-08-20-ISelBug.ll	Remove arm_apcscc from the test files. It is the default and doing this	2010-06-17 15:18:27 +00:00
2009-12-17-pre-regalloc-taildup.ll	Remove arm_apcscc from the test files. It is the default and doing this	2010-06-17 15:18:27 +00:00
2010-01-15-local-alloc-spill-physical.ll	Remove arm_apcscc from the test files. It is the default and doing this	2010-06-17 15:18:27 +00:00
2010-04-07-DbgValueOtherTargets.ll	Split big test into multiple directories to cater to	2010-04-07 20:43:35 +00:00
2010-06-18-SibCallCrash.ll	Disable sibcall optimization for Thumb1 for now since Thumb1RegisterInfo::emitEpilogue is not expecting them.	2010-06-19 01:01:32 +00:00
2010-07-01-FuncAlign.ll	ARM function alignments were off by a power of two. svn 83242 changed	2010-07-01 22:26:26 +00:00
2010-07-15-debugOrdering.ll	Try again to disable critical edge splitting in CodeGenPrepare.	2010-09-30 20:51:52 +00:00
asmprinter-bug.ll	Remove arm_apcscc from the test files. It is the default and doing this	2010-06-17 15:18:27 +00:00
barrier.ll	Overhaul memory barriers in the ARM backend. Radar 8601999.	2010-10-30 00:54:37 +00:00
dg.exp
dyn-stackalloc.ll	Re-enable usage of the ARM base pointer. r113394 fixed the known failures.	2010-09-08 20:12:02 +00:00
fpconv.ll
fpow.ll
frame_thumb.ll
iabs.ll
inlineasm-imm-thumb.ll
ispositive.ll
large-stack.ll	Enable pre-RA virtual frame base register allocation. rdar://8277890	2010-08-26 00:58:06 +00:00
ldr_ext.ll
ldr_frame.ll
long_shift.ll
long-setcc.ll
long.ll
machine-licm.ll	Remove arm_apcscc from the test files. It is the default and doing this	2010-06-17 15:18:27 +00:00
mul.ll
pop.ll	Remove arm_apcscc from the test files. It is the default and doing this	2010-06-17 15:18:27 +00:00
push.ll	Propagate the AlignStack bit in InlineAsm's to the	2010-07-02 20:16:09 +00:00
select.ll
stack-frame.ll
thumb-imm.ll
trap.ll	Remove arm_apcscc from the test files. It is the default and doing this	2010-06-17 15:18:27 +00:00
tst_teq.ll
unord.ll
vargs.ll	Update test for 112609	2010-08-31 17:58:47 +00:00