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https://github.com/c64scene-ar/llvm-6502.git
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323ac85d6a
ARM prologues usually look like:
push {r7, lr}
sub sp, sp, #4
If code size is extremely important, this can be optimised to the single
instruction:
push {r6, r7, lr}
where we don't actually care about the contents of r6, but pushing it subtracts
4 from sp as a side effect.
This should implement such a conversion, predicated on the "minsize" function
attribute (-Oz) since I've yet to find any code it actually makes faster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194264 91177308-0d34-0410-b5e6-96231b3b80d8
127 lines
3.3 KiB
LLVM
127 lines
3.3 KiB
LLVM
; RUN: llc -mtriple=thumbv7-apple-darwin-eabi < %s | FileCheck %s
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; RUN: llc -mtriple=thumbv6m-apple-darwin-eabi -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-T1
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; RUN: llc -mtriple=thumbv7-apple-darwin-ios -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-IOS
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declare void @bar(i8*)
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%bigVec = type [2 x double]
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@var = global %bigVec zeroinitializer
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define void @check_simple() minsize {
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; CHECK-LABEL: check_simple:
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; CHECK: push.w {r7, r8, r9, r10, r11, lr}
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; CHECK-NOT: sub sp, sp,
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; ...
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; CHECK-NOT: add sp, sp,
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; CHECK: pop.w {r7, r8, r9, r10, r11, pc}
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; CHECK-T1-LABEL: check_simple:
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; CHECK-T1: push {r3, r4, r5, r6, r7, lr}
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; CHECK-T1: add r7, sp, #16
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; CHECK-T1-NOT: sub sp, sp,
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; ...
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; CHECK-T1-NOT: add sp, sp,
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; CHECK-T1: pop {r3, r4, r5, r6, r7, pc}
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; iOS always has a frame pointer and messing with the push affects
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; how it's set in the prologue. Make sure we get that right.
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; CHECK-IOS-LABEL: check_simple:
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; CHECK-IOS: push {r3, r4, r5, r6, r7, lr}
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; CHECK-NOT: sub sp,
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; CHECK-IOS: add r7, sp, #16
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; CHECK-NOT: sub sp,
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; ...
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; CHECK-NOT: add sp,
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; CHEC: pop {r3, r4, r5, r6, r7, pc}
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%var = alloca i8, i32 16
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call void @bar(i8* %var)
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ret void
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}
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define void @check_simple_too_big() minsize {
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; CHECK-LABEL: check_simple_too_big:
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; CHECK: push.w {r11, lr}
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; CHECK: sub sp,
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; ...
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; CHECK: add sp,
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; CHECK: pop.w {r11, pc}
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%var = alloca i8, i32 64
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call void @bar(i8* %var)
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ret void
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}
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define void @check_vfp_fold() minsize {
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; CHECK-LABEL: check_vfp_fold:
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; CHECK: push {r[[GLOBREG:[0-9]+]], lr}
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; CHECK: vpush {d6, d7, d8, d9}
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; CHECK-NOT: sub sp,
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; ...
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; CHECK: vldmia r[[GLOBREG]], {d8, d9}
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; ...
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; CHECK-NOT: add sp,
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; CHECK: vpop {d6, d7, d8, d9}
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; CHECKL pop {r[[GLOBREG]], pc}
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; iOS uses aligned NEON stores here, which is convenient since we
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; want to make sure that works too.
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; CHECK-IOS-LABEL: check_vfp_fold:
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; CHECK-IOS: push {r0, r1, r2, r3, r4, r7, lr}
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; CHECK-IOS: sub.w r4, sp, #16
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; CHECK-IOS: bic r4, r4, #15
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; CHECK-IOS: mov sp, r4
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; CHECK-IOS: vst1.64 {d8, d9}, [r4:128]
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; ...
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; CHECK-IOS: add r4, sp, #16
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; CHECK-IOS: vld1.64 {d8, d9}, [r4:128]
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; CHECK-IOS: mov sp, r4
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; CHECK-IOS: pop {r4, r7, pc}
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%var = alloca i8, i32 16
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%tmp = load %bigVec* @var
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call void @bar(i8* %var)
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store %bigVec %tmp, %bigVec* @var
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ret void
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}
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; This function should use just enough space that the "add sp, sp, ..." could be
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; folded in except that doing so would clobber the value being returned.
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define i64 @check_no_return_clobber() minsize {
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; CHECK-LABEL: check_no_return_clobber:
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; CHECK: push.w {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, lr}
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; CHECK-NOT: sub sp,
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; ...
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; CHECK: add sp, #40
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; CHECK: pop.w {r11, pc}
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; Just to keep iOS FileCheck within previous function:
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; CHECK-IOS-LABEL: check_no_return_clobber:
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%var = alloca i8, i32 40
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call void @bar(i8* %var)
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ret i64 0
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}
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define arm_aapcs_vfpcc double @check_vfp_no_return_clobber() minsize {
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; CHECK-LABEL: check_vfp_no_return_clobber:
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; CHECK: push {r[[GLOBREG:[0-9]+]], lr}
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; CHECK: vpush {d0, d1, d2, d3, d4, d5, d6, d7, d8, d9}
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; CHECK-NOT: sub sp,
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; ...
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; CHECK: add sp, #64
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; CHECK: vpop {d8, d9}
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; CHECK: pop {r[[GLOBREG]], pc}
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%var = alloca i8, i32 64
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%tmp = load %bigVec* @var
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call void @bar(i8* %var)
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store %bigVec %tmp, %bigVec* @var
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ret double 1.0
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}
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