llvm-6502/test/CodeGen
Bob Wilson 103b4a571e Revert "Adding support for llvm.arm.neon.vaddl[su].* and"
This reverts r170694.  The operations can be represented in IR without
adding any new intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170765 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20 21:09:38 +00:00
..
ARM Revert "Adding support for llvm.arm.neon.vaddl[su].* and" 2012-12-20 21:09:38 +00:00
CPP
Generic After reducing the size of an operation in the DAG we zero-extend the reduced 2012-12-19 07:39:08 +00:00
Hexagon In hexagon convertToHardwareLoop, don't deref end() iterator 2012-12-07 21:03:15 +00:00
MBlaze
Mips fix most of remaining issues with large frames. 2012-12-20 04:07:42 +00:00
MSP430
NVPTX [NVPTX] Fix crash with unnamed struct arguments 2012-12-05 20:50:28 +00:00
PowerPC Simplify the testcase a bit. 2012-12-20 17:47:27 +00:00
R600 Add R600 backend 2012-12-11 21:25:42 +00:00
SI Add R600 backend 2012-12-11 21:25:42 +00:00
SPARC
Thumb Use the 'count' attribute to calculate the upper bound of an array. 2012-12-04 21:34:03 +00:00
Thumb2 On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr, 2012-12-20 19:59:30 +00:00
X86 Do not introduce vector operations in functions marked with noimplicitfloat. 2012-12-20 01:36:20 +00:00
XCore