Ahmed Bougacha bc92b2ca37 [AArch64] Don't assert when combining (v3f32 select (setcc f64)). ... When the setcc has f64 operands, we can't build a vector setcc mask to feed a vselect, because f64 doesn't divide v3f32 evenly. Just bail out when that happens. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235917 91177308-0d34-0410-b5e6-96231b3b80d8		2015-04-27 21:01:20 +00:00
..
Analysis	Fix typo in comment.	2015-04-24 15:46:41 +00:00
AsmParser	IR: Add assembly/bitcode support for function metadata attachments	2015-04-24 22:04:41 +00:00
Bitcode	[opaque pointer type] encode the pointee type of global variables	2015-04-27 19:58:56 +00:00
CodeGen	Switch lowering: order bit tests by branch weight.	2015-04-27 20:21:17 +00:00
DebugInfo	Make llvm-symbolizer work on Windows.	2015-04-27 17:19:51 +00:00
ExecutionEngine
Fuzzer
IR	Constfold insertelement to undef when index is out-of-bounds	2015-04-27 09:30:49 +00:00
IRReader
LineEditor
Linker	Linker: Copy over function metadata attachments	2015-04-24 22:07:31 +00:00
LTO
MC	[MC] [IAS] Add support for the \@ .macro pseudo-variable.	2015-04-27 10:50:29 +00:00
Object
Option
Passes
ProfileData
Support	Fixes a hang that can occur if a signal comes in during malloc calls.	2015-04-27 20:45:35 +00:00
TableGen
Target	[AArch64] Don't assert when combining (v3f32 select (setcc f64)).	2015-04-27 21:01:20 +00:00
Transforms	[RewriteStatepointsForGC] Exclude constant values from being considered live at a safepoint	2015-04-26 19:48:03 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile