mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-16 11:30:51 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
58 lines
1.8 KiB
LLVM
58 lines
1.8 KiB
LLVM
; RUN: llc -mattr=+altivec < %s | FileCheck %s
|
|
|
|
; Check vector float/int conversion using altivec.
|
|
|
|
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
|
|
target triple = "powerpc64-unknown-linux-gnu"
|
|
|
|
@cte_float = global <4 x float> <float 6.5e+00, float 6.5e+00, float 6.5e+00, float 6.5e+00>, align 16
|
|
@cte_int = global <4 x i32> <i32 6, i32 6, i32 6, i32 6>, align 16
|
|
|
|
|
|
define void @v4f32_to_v4i32(<4 x float> %x, <4 x i32>* nocapture %y) nounwind {
|
|
entry:
|
|
%0 = load <4 x float>, <4 x float>* @cte_float, align 16
|
|
%mul = fmul <4 x float> %0, %x
|
|
%1 = fptosi <4 x float> %mul to <4 x i32>
|
|
store <4 x i32> %1, <4 x i32>* %y, align 16
|
|
ret void
|
|
}
|
|
;CHECK-LABEL: v4f32_to_v4i32:
|
|
;CHECK: vctsxs {{[0-9]+}}, {{[0-9]+}}, 0
|
|
|
|
|
|
define void @v4f32_to_v4u32(<4 x float> %x, <4 x i32>* nocapture %y) nounwind {
|
|
entry:
|
|
%0 = load <4 x float>, <4 x float>* @cte_float, align 16
|
|
%mul = fmul <4 x float> %0, %x
|
|
%1 = fptoui <4 x float> %mul to <4 x i32>
|
|
store <4 x i32> %1, <4 x i32>* %y, align 16
|
|
ret void
|
|
}
|
|
;CHECK-LABEL: v4f32_to_v4u32:
|
|
;CHECK: vctuxs {{[0-9]+}}, {{[0-9]+}}, 0
|
|
|
|
|
|
define void @v4i32_to_v4f32(<4 x i32> %x, <4 x float>* nocapture %y) nounwind {
|
|
entry:
|
|
%0 = load <4 x i32>, <4 x i32>* @cte_int, align 16
|
|
%mul = mul <4 x i32> %0, %x
|
|
%1 = sitofp <4 x i32> %mul to <4 x float>
|
|
store <4 x float> %1, <4 x float>* %y, align 16
|
|
ret void
|
|
}
|
|
;CHECK-LABEL: v4i32_to_v4f32:
|
|
;CHECK: vcfsx {{[0-9]+}}, {{[0-9]+}}, 0
|
|
|
|
|
|
define void @v4u32_to_v4f32(<4 x i32> %x, <4 x float>* nocapture %y) nounwind {
|
|
entry:
|
|
%0 = load <4 x i32>, <4 x i32>* @cte_int, align 16
|
|
%mul = mul <4 x i32> %0, %x
|
|
%1 = uitofp <4 x i32> %mul to <4 x float>
|
|
store <4 x float> %1, <4 x float>* %y, align 16
|
|
ret void
|
|
}
|
|
;CHECK-LABEL: v4u32_to_v4f32:
|
|
;CHECK: vcfux {{[0-9]+}}, {{[0-9]+}}, 0
|