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https://github.com/c64scene-ar/llvm-6502.git
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f1b16047b7
Add some more tests to make sure better operand choices are still made. Leave some cases that seem to have no reason to ever be e64 alone. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217789 91177308-0d34-0410-b5e6-96231b3b80d8
68 lines
2.4 KiB
LLVM
68 lines
2.4 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s
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; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG %s
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define void @trunc_i64_to_i32_store(i32 addrspace(1)* %out, i64 %in) {
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; SI-LABEL: @trunc_i64_to_i32_store
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; SI: S_LOAD_DWORD [[SLOAD:s[0-9]+]], s[0:1], 0xb
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; SI: V_MOV_B32_e32 [[VLOAD:v[0-9]+]], [[SLOAD]]
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; SI: BUFFER_STORE_DWORD [[VLOAD]]
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; EG-LABEL: @trunc_i64_to_i32_store
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; EG: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
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; EG: LSHR
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; EG-NEXT: 2(
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%result = trunc i64 %in to i32 store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: @trunc_load_shl_i64:
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; SI-DAG: S_LOAD_DWORDX2
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; SI-DAG: S_LOAD_DWORD [[SREG:s[0-9]+]],
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; SI: S_LSHL_B32 [[SHL:s[0-9]+]], [[SREG]], 2
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; SI: V_MOV_B32_e32 [[VSHL:v[0-9]+]], [[SHL]]
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; SI: BUFFER_STORE_DWORD [[VSHL]],
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define void @trunc_load_shl_i64(i32 addrspace(1)* %out, i64 %a) {
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%b = shl i64 %a, 2
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%result = trunc i64 %b to i32
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: @trunc_shl_i64:
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; SI: S_LOAD_DWORDX2 s{{\[}}[[LO_SREG:[0-9]+]]:{{[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0xd
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; SI: S_LSHL_B64 s{{\[}}[[LO_SHL:[0-9]+]]:{{[0-9]+\]}}, s{{\[}}[[LO_SREG]]:{{[0-9]+\]}}, 2
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; SI: S_ADD_U32 s[[LO_SREG2:[0-9]+]], s[[LO_SHL]],
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; SI: S_ADDC_U32
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; SI: V_MOV_B32_e32 v[[LO_VREG:[0-9]+]], s[[LO_SREG2]]
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; SI: BUFFER_STORE_DWORD v[[LO_VREG]],
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define void @trunc_shl_i64(i64 addrspace(1)* %out2, i32 addrspace(1)* %out, i64 %a) {
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%aa = add i64 %a, 234 ; Prevent shrinking store.
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%b = shl i64 %aa, 2
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%result = trunc i64 %b to i32
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store i32 %result, i32 addrspace(1)* %out, align 4
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store i64 %b, i64 addrspace(1)* %out2, align 8 ; Prevent reducing ops to 32-bits
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ret void
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}
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; SI-LABEL: @trunc_i32_to_i1:
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; SI: V_AND_B32_e32 v{{[0-9]+}}, 1, v{{[0-9]+}}
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; SI: V_CMP_EQ_I32
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define void @trunc_i32_to_i1(i32 addrspace(1)* %out, i32 addrspace(1)* %ptr) {
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%a = load i32 addrspace(1)* %ptr, align 4
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%trunc = trunc i32 %a to i1
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%result = select i1 %trunc, i32 1, i32 0
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: @sgpr_trunc_i32_to_i1:
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; SI: V_AND_B32_e64 v{{[0-9]+}}, 1, s{{[0-9]+}}
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; SI: V_CMP_EQ_I32
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define void @sgpr_trunc_i32_to_i1(i32 addrspace(1)* %out, i32 %a) {
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%trunc = trunc i32 %a to i1
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%result = select i1 %trunc, i32 1, i32 0
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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