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3890e397c3
An OpReinterpret entry is handled by translating it to OpCast intrinsics for all combinations of source and destination types with the same total size. This will be used to generate all the vreinterpret intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121087 91177308-0d34-0410-b5e6-96231b3b80d8
131 lines
3.2 KiB
C++
131 lines
3.2 KiB
C++
//===- NeonEmitter.h - Generate arm_neon.h for use with clang ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This tablegen backend is responsible for emitting arm_neon.h, which includes
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// a declaration and definition of each function specified by the ARM NEON
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// compiler interface. See ARM document DUI0348B.
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//
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//===----------------------------------------------------------------------===//
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#ifndef NEON_EMITTER_H
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#define NEON_EMITTER_H
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#include "Record.h"
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#include "TableGenBackend.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/StringMap.h"
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enum OpKind {
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OpNone,
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OpAdd,
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OpSub,
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OpMul,
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OpMla,
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OpMls,
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OpMulN,
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OpMlaN,
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OpMlsN,
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OpMulLane,
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OpMlaLane,
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OpMlsLane,
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OpEq,
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OpGe,
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OpLe,
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OpGt,
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OpLt,
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OpNeg,
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OpNot,
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OpAnd,
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OpOr,
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OpXor,
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OpAndNot,
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OpOrNot,
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OpCast,
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OpConcat,
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OpDup,
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OpHi,
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OpLo,
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OpSelect,
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OpRev16,
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OpRev32,
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OpRev64,
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OpReinterpret
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};
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enum ClassKind {
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ClassNone,
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ClassI, // generic integer instruction, e.g., "i8" suffix
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ClassS, // signed/unsigned/poly, e.g., "s8", "u8" or "p8" suffix
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ClassW, // width-specific instruction, e.g., "8" suffix
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ClassB // bitcast arguments with enum argument to specify type
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};
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namespace llvm {
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class NeonEmitter : public TableGenBackend {
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RecordKeeper &Records;
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StringMap<OpKind> OpMap;
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DenseMap<Record*, ClassKind> ClassMap;
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public:
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NeonEmitter(RecordKeeper &R) : Records(R) {
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OpMap["OP_NONE"] = OpNone;
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OpMap["OP_ADD"] = OpAdd;
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OpMap["OP_SUB"] = OpSub;
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OpMap["OP_MUL"] = OpMul;
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OpMap["OP_MLA"] = OpMla;
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OpMap["OP_MLS"] = OpMls;
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OpMap["OP_MUL_N"] = OpMulN;
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OpMap["OP_MLA_N"] = OpMlaN;
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OpMap["OP_MLS_N"] = OpMlsN;
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OpMap["OP_MUL_LN"]= OpMulLane;
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OpMap["OP_MLA_LN"]= OpMlaLane;
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OpMap["OP_MLS_LN"]= OpMlsLane;
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OpMap["OP_EQ"] = OpEq;
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OpMap["OP_GE"] = OpGe;
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OpMap["OP_LE"] = OpLe;
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OpMap["OP_GT"] = OpGt;
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OpMap["OP_LT"] = OpLt;
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OpMap["OP_NEG"] = OpNeg;
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OpMap["OP_NOT"] = OpNot;
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OpMap["OP_AND"] = OpAnd;
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OpMap["OP_OR"] = OpOr;
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OpMap["OP_XOR"] = OpXor;
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OpMap["OP_ANDN"] = OpAndNot;
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OpMap["OP_ORN"] = OpOrNot;
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OpMap["OP_CAST"] = OpCast;
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OpMap["OP_CONC"] = OpConcat;
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OpMap["OP_HI"] = OpHi;
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OpMap["OP_LO"] = OpLo;
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OpMap["OP_DUP"] = OpDup;
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OpMap["OP_SEL"] = OpSelect;
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OpMap["OP_REV16"] = OpRev16;
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OpMap["OP_REV32"] = OpRev32;
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OpMap["OP_REV64"] = OpRev64;
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OpMap["OP_REINT"] = OpReinterpret;
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Record *SI = R.getClass("SInst");
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Record *II = R.getClass("IInst");
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Record *WI = R.getClass("WInst");
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ClassMap[SI] = ClassS;
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ClassMap[II] = ClassI;
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ClassMap[WI] = ClassW;
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}
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// run - Emit arm_neon.h.inc
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void run(raw_ostream &o);
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// runHeader - Emit all the __builtin prototypes used in arm_neon.h
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void runHeader(raw_ostream &o);
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};
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} // End llvm namespace
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#endif
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