llvm-6502/test
Daniel Sanders bd48d31b37 [mips] Rewrite MipsAsmParser and MipsOperand.
Summary:
Highlights:
- Registers are resolved much later (by the render method).
  Prior to that point, GPR32's/GPR64's are GPR's regardless of register
  size. Similarly FGR32's/FGR64's/AFGR64's are FGR's regardless of register
  size or FR mode. Numeric registers can be anything.
- All registers are parsed the same way everywhere (even when handling
  symbol aliasing)
  - One consequence is that all registers can be specified numerically
    almost anywhere (e.g. $fccX, $wX). The exception is symbol aliasing
    but that can be easily resolved.
- Removes the need for the hasConsumedDollar hack
- Parenthesis and Bracket suffixes are handled generically
- Micromips instructions are parsed directly instead of going through the
  standard encodings first.
- rdhwr accepts all 32 registers, and the following instructions that previously
  xfailed now work:
    ddiv, ddivu, div, divu, cvt.l.[ds], se[bh], wsbh, floor.w.[ds], c.ngl.d,
    c.sf.s, dsbh, dshd, madd.s, msub.s, nmadd.s, nmsub.s, swxc1
- Diagnostics involving registers point at the correct character (the $)
- There's only one kind of immediate in MipsOperand. LSA immediates are handled
  by the predicate and renderer.

Lowlights:
- Hardcoded '$zero' in the div patterns is handled with a hack.
  MipsOperand::isReg() will return true for a k_RegisterIndex token
  with Index == 0 and getReg() will return ZERO for this case. Note that it
  doesn't return ZERO_64 on isGP64() targets.
- I haven't cleaned up all of the now-unused functions.
  Some more of the generic parser could be removed too (integers and relocs
  for example).
- insve.df needed a custom decoder to handle the implicit fourth operand that
  was needed to make it parse correctly. The difficulty was that the matcher
  expected a Token<'0'> but gets an Imm<0>. Adding an implicit zero solved this.

Reviewers: matheusalmeida, vmedic

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3222

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205292 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 10:35:28 +00:00
..
Analysis ARM64: initial backend import 2014-03-29 10:18:08 +00:00
Assembler Reject alias to undefined symbols in the verifier. 2014-03-12 20:15:49 +00:00
Bindings Fix the ocaml test to not create a alias to a declaration. 2014-03-12 21:20:42 +00:00
Bitcode All new elements except the last one initialized to NULL. Ideally, once parsing is complete, all elements should be non-NULL. 2014-03-27 12:08:23 +00:00
BugPoint llvm/test/BugPoint/compile-custom.ll.py: Make it py3-compatible. [PR19112] 2014-03-13 00:10:37 +00:00
CodeGen [x86] Do not convert to cmp32 for Atom arch by Sergey Okunev 2014-04-01 08:13:07 +00:00
DebugInfo DebugInfo: Avoid creating unnecessary/empty line tables and remove the special case of '0' in DwarfCompileUnit::initStmtList by just always using a label difference 2014-04-01 08:07:52 +00:00
ExecutionEngine
Feature Disable each MachineFunctionPass for 'optnone' functions, unless that 2014-03-31 17:43:35 +00:00
FileCheck
Instrumentation [msan] Relax the test some more. 2014-03-25 14:32:05 +00:00
Integer
JitListener
Linker Switch the type field in DIVariable and DIGlobalVariable over to DITypeRefs. 2014-03-18 02:34:58 +00:00
LTO This patch fixes LTO's RecordStreamer so that it records symbols in the MCExpr 2014-03-31 16:59:13 +00:00
MC [mips] Rewrite MipsAsmParser and MipsOperand. 2014-04-01 10:35:28 +00:00
Object [yaml2obj] Add support for ELF e_flags. 2014-03-31 09:44:05 +00:00
Other
TableGen
tools llvm-cov: Move XFAIL after the body of the test 2014-03-26 22:51:39 +00:00
Transforms Move partial/runtime unrolling late in the pipeline 2014-03-31 23:23:51 +00:00
Unit
Verifier Reject alias to undefined symbols in the verifier. 2014-03-12 20:15:49 +00:00
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg llvm-mc: error when -compress-debug-sections is requested and zlib is not linked 2014-03-28 20:45:24 +00:00
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh