llvm-6502/test/MC/Disassembler
Kit Barton 40057e8ee8 Add the following 64-bit vector integer arithmetic instructions added in POWER8:
vaddudm
vsubudm
vmulesw
vmulosw
vmuleuw
vmulouw
vmuluwm
vmaxsd
vmaxud
vminsd
vminud
vcmpequd
vcmpequd.
vcmpgtsd
vcmpgtsd.
vcmpgtud
vcmpgtud.
vrld
vsld
vsrd
vsrad

Phabricator review: http://reviews.llvm.org/D7959


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231115 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-03 19:55:45 +00:00
..
AArch64 Condition codes AL and NV are invalid in the aliases that use 2014-06-10 13:11:35 +00:00
ARM Add support for ARM modified-immediate assembly syntax. 2014-12-02 10:53:20 +00:00
Hexagon [Hexagon] Adding missing vector multiply instruction encodings. Converting multiply intrinsics and updating tests. 2015-02-03 19:15:11 +00:00
Mips [mips] Add backend support for Mips32r[35] and Mips64r[35]. 2015-02-18 16:24:50 +00:00
PowerPC Add the following 64-bit vector integer arithmetic instructions added in POWER8: 2015-03-03 19:55:45 +00:00
Sparc Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
SystemZ [SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA 2014-07-10 11:00:55 +00:00
X86 [X86] Fix diassembler crash on AVX512 cmpps/cmppd with immediate that doesn't fit in 5-bits. Fixes PR22743. 2015-03-02 00:22:29 +00:00
XCore Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00