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and T->isPointerTy(). Convert most instances of the first form to the second form. Requested by Chris. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96344 91177308-0d34-0410-b5e6-96231b3b80d8
597 lines
22 KiB
C++
597 lines
22 KiB
C++
//===- AddrModeMatcher.cpp - Addressing mode matching facility --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements target addressing mode matcher class.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Transforms/Utils/AddrModeMatcher.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/GlobalValue.h"
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#include "llvm/Instruction.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/GetElementPtrTypeIterator.h"
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#include "llvm/Support/PatternMatch.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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using namespace llvm::PatternMatch;
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void ExtAddrMode::print(raw_ostream &OS) const {
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bool NeedPlus = false;
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OS << "[";
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if (BaseGV) {
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OS << (NeedPlus ? " + " : "")
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<< "GV:";
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WriteAsOperand(OS, BaseGV, /*PrintType=*/false);
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NeedPlus = true;
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}
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if (BaseOffs)
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OS << (NeedPlus ? " + " : "") << BaseOffs, NeedPlus = true;
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if (BaseReg) {
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OS << (NeedPlus ? " + " : "")
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<< "Base:";
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WriteAsOperand(OS, BaseReg, /*PrintType=*/false);
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NeedPlus = true;
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}
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if (Scale) {
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OS << (NeedPlus ? " + " : "")
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<< Scale << "*";
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WriteAsOperand(OS, ScaledReg, /*PrintType=*/false);
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NeedPlus = true;
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}
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OS << ']';
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}
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void ExtAddrMode::dump() const {
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print(dbgs());
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dbgs() << '\n';
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}
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/// MatchScaledValue - Try adding ScaleReg*Scale to the current addressing mode.
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/// Return true and update AddrMode if this addr mode is legal for the target,
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/// false if not.
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bool AddressingModeMatcher::MatchScaledValue(Value *ScaleReg, int64_t Scale,
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unsigned Depth) {
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// If Scale is 1, then this is the same as adding ScaleReg to the addressing
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// mode. Just process that directly.
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if (Scale == 1)
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return MatchAddr(ScaleReg, Depth);
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// If the scale is 0, it takes nothing to add this.
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if (Scale == 0)
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return true;
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// If we already have a scale of this value, we can add to it, otherwise, we
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// need an available scale field.
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if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg)
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return false;
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ExtAddrMode TestAddrMode = AddrMode;
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// Add scale to turn X*4+X*3 -> X*7. This could also do things like
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// [A+B + A*7] -> [B+A*8].
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TestAddrMode.Scale += Scale;
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TestAddrMode.ScaledReg = ScaleReg;
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// If the new address isn't legal, bail out.
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if (!TLI.isLegalAddressingMode(TestAddrMode, AccessTy))
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return false;
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// It was legal, so commit it.
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AddrMode = TestAddrMode;
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// Okay, we decided that we can add ScaleReg+Scale to AddrMode. Check now
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// to see if ScaleReg is actually X+C. If so, we can turn this into adding
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// X*Scale + C*Scale to addr mode.
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ConstantInt *CI = 0; Value *AddLHS = 0;
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if (isa<Instruction>(ScaleReg) && // not a constant expr.
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match(ScaleReg, m_Add(m_Value(AddLHS), m_ConstantInt(CI)))) {
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TestAddrMode.ScaledReg = AddLHS;
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TestAddrMode.BaseOffs += CI->getSExtValue()*TestAddrMode.Scale;
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// If this addressing mode is legal, commit it and remember that we folded
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// this instruction.
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if (TLI.isLegalAddressingMode(TestAddrMode, AccessTy)) {
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AddrModeInsts.push_back(cast<Instruction>(ScaleReg));
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AddrMode = TestAddrMode;
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return true;
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}
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}
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// Otherwise, not (x+c)*scale, just return what we have.
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return true;
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}
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/// MightBeFoldableInst - This is a little filter, which returns true if an
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/// addressing computation involving I might be folded into a load/store
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/// accessing it. This doesn't need to be perfect, but needs to accept at least
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/// the set of instructions that MatchOperationAddr can.
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static bool MightBeFoldableInst(Instruction *I) {
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switch (I->getOpcode()) {
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case Instruction::BitCast:
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// Don't touch identity bitcasts.
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if (I->getType() == I->getOperand(0)->getType())
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return false;
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return I->getType()->isPointerTy() || I->getType()->isIntegerTy();
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case Instruction::PtrToInt:
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// PtrToInt is always a noop, as we know that the int type is pointer sized.
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return true;
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case Instruction::IntToPtr:
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// We know the input is intptr_t, so this is foldable.
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return true;
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case Instruction::Add:
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return true;
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case Instruction::Mul:
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case Instruction::Shl:
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// Can only handle X*C and X << C.
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return isa<ConstantInt>(I->getOperand(1));
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case Instruction::GetElementPtr:
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return true;
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default:
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return false;
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}
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}
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/// MatchOperationAddr - Given an instruction or constant expr, see if we can
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/// fold the operation into the addressing mode. If so, update the addressing
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/// mode and return true, otherwise return false without modifying AddrMode.
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bool AddressingModeMatcher::MatchOperationAddr(User *AddrInst, unsigned Opcode,
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unsigned Depth) {
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// Avoid exponential behavior on extremely deep expression trees.
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if (Depth >= 5) return false;
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switch (Opcode) {
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case Instruction::PtrToInt:
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// PtrToInt is always a noop, as we know that the int type is pointer sized.
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return MatchAddr(AddrInst->getOperand(0), Depth);
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case Instruction::IntToPtr:
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// This inttoptr is a no-op if the integer type is pointer sized.
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if (TLI.getValueType(AddrInst->getOperand(0)->getType()) ==
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TLI.getPointerTy())
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return MatchAddr(AddrInst->getOperand(0), Depth);
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return false;
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case Instruction::BitCast:
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// BitCast is always a noop, and we can handle it as long as it is
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// int->int or pointer->pointer (we don't want int<->fp or something).
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if ((AddrInst->getOperand(0)->getType()->isPointerTy() ||
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AddrInst->getOperand(0)->getType()->isIntegerTy()) &&
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// Don't touch identity bitcasts. These were probably put here by LSR,
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// and we don't want to mess around with them. Assume it knows what it
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// is doing.
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AddrInst->getOperand(0)->getType() != AddrInst->getType())
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return MatchAddr(AddrInst->getOperand(0), Depth);
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return false;
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case Instruction::Add: {
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// Check to see if we can merge in the RHS then the LHS. If so, we win.
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ExtAddrMode BackupAddrMode = AddrMode;
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unsigned OldSize = AddrModeInsts.size();
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if (MatchAddr(AddrInst->getOperand(1), Depth+1) &&
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MatchAddr(AddrInst->getOperand(0), Depth+1))
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return true;
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// Restore the old addr mode info.
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AddrMode = BackupAddrMode;
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AddrModeInsts.resize(OldSize);
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// Otherwise this was over-aggressive. Try merging in the LHS then the RHS.
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if (MatchAddr(AddrInst->getOperand(0), Depth+1) &&
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MatchAddr(AddrInst->getOperand(1), Depth+1))
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return true;
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// Otherwise we definitely can't merge the ADD in.
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AddrMode = BackupAddrMode;
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AddrModeInsts.resize(OldSize);
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break;
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}
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//case Instruction::Or:
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// TODO: We can handle "Or Val, Imm" iff this OR is equivalent to an ADD.
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//break;
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case Instruction::Mul:
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case Instruction::Shl: {
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// Can only handle X*C and X << C.
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ConstantInt *RHS = dyn_cast<ConstantInt>(AddrInst->getOperand(1));
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if (!RHS) return false;
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int64_t Scale = RHS->getSExtValue();
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if (Opcode == Instruction::Shl)
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Scale = 1LL << Scale;
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return MatchScaledValue(AddrInst->getOperand(0), Scale, Depth);
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}
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case Instruction::GetElementPtr: {
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// Scan the GEP. We check it if it contains constant offsets and at most
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// one variable offset.
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int VariableOperand = -1;
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unsigned VariableScale = 0;
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int64_t ConstantOffset = 0;
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const TargetData *TD = TLI.getTargetData();
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gep_type_iterator GTI = gep_type_begin(AddrInst);
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for (unsigned i = 1, e = AddrInst->getNumOperands(); i != e; ++i, ++GTI) {
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if (const StructType *STy = dyn_cast<StructType>(*GTI)) {
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const StructLayout *SL = TD->getStructLayout(STy);
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unsigned Idx =
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cast<ConstantInt>(AddrInst->getOperand(i))->getZExtValue();
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ConstantOffset += SL->getElementOffset(Idx);
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} else {
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uint64_t TypeSize = TD->getTypeAllocSize(GTI.getIndexedType());
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if (ConstantInt *CI = dyn_cast<ConstantInt>(AddrInst->getOperand(i))) {
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ConstantOffset += CI->getSExtValue()*TypeSize;
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} else if (TypeSize) { // Scales of zero don't do anything.
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// We only allow one variable index at the moment.
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if (VariableOperand != -1)
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return false;
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// Remember the variable index.
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VariableOperand = i;
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VariableScale = TypeSize;
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}
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}
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}
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// A common case is for the GEP to only do a constant offset. In this case,
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// just add it to the disp field and check validity.
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if (VariableOperand == -1) {
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AddrMode.BaseOffs += ConstantOffset;
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if (ConstantOffset == 0 || TLI.isLegalAddressingMode(AddrMode, AccessTy)){
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// Check to see if we can fold the base pointer in too.
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if (MatchAddr(AddrInst->getOperand(0), Depth+1))
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return true;
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}
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AddrMode.BaseOffs -= ConstantOffset;
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return false;
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}
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// Save the valid addressing mode in case we can't match.
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ExtAddrMode BackupAddrMode = AddrMode;
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unsigned OldSize = AddrModeInsts.size();
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// See if the scale and offset amount is valid for this target.
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AddrMode.BaseOffs += ConstantOffset;
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// Match the base operand of the GEP.
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if (!MatchAddr(AddrInst->getOperand(0), Depth+1)) {
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// If it couldn't be matched, just stuff the value in a register.
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if (AddrMode.HasBaseReg) {
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AddrMode = BackupAddrMode;
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AddrModeInsts.resize(OldSize);
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return false;
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}
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AddrMode.HasBaseReg = true;
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AddrMode.BaseReg = AddrInst->getOperand(0);
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}
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// Match the remaining variable portion of the GEP.
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if (!MatchScaledValue(AddrInst->getOperand(VariableOperand), VariableScale,
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Depth)) {
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// If it couldn't be matched, try stuffing the base into a register
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// instead of matching it, and retrying the match of the scale.
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AddrMode = BackupAddrMode;
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AddrModeInsts.resize(OldSize);
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if (AddrMode.HasBaseReg)
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return false;
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AddrMode.HasBaseReg = true;
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AddrMode.BaseReg = AddrInst->getOperand(0);
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AddrMode.BaseOffs += ConstantOffset;
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if (!MatchScaledValue(AddrInst->getOperand(VariableOperand),
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VariableScale, Depth)) {
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// If even that didn't work, bail.
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AddrMode = BackupAddrMode;
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AddrModeInsts.resize(OldSize);
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return false;
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}
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}
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return true;
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}
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}
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return false;
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}
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/// MatchAddr - If we can, try to add the value of 'Addr' into the current
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/// addressing mode. If Addr can't be added to AddrMode this returns false and
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/// leaves AddrMode unmodified. This assumes that Addr is either a pointer type
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/// or intptr_t for the target.
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///
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bool AddressingModeMatcher::MatchAddr(Value *Addr, unsigned Depth) {
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if (ConstantInt *CI = dyn_cast<ConstantInt>(Addr)) {
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// Fold in immediates if legal for the target.
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AddrMode.BaseOffs += CI->getSExtValue();
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if (TLI.isLegalAddressingMode(AddrMode, AccessTy))
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return true;
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AddrMode.BaseOffs -= CI->getSExtValue();
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} else if (GlobalValue *GV = dyn_cast<GlobalValue>(Addr)) {
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// If this is a global variable, try to fold it into the addressing mode.
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if (AddrMode.BaseGV == 0) {
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AddrMode.BaseGV = GV;
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if (TLI.isLegalAddressingMode(AddrMode, AccessTy))
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return true;
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AddrMode.BaseGV = 0;
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}
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} else if (Instruction *I = dyn_cast<Instruction>(Addr)) {
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ExtAddrMode BackupAddrMode = AddrMode;
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unsigned OldSize = AddrModeInsts.size();
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// Check to see if it is possible to fold this operation.
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if (MatchOperationAddr(I, I->getOpcode(), Depth)) {
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// Okay, it's possible to fold this. Check to see if it is actually
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// *profitable* to do so. We use a simple cost model to avoid increasing
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// register pressure too much.
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if (I->hasOneUse() ||
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IsProfitableToFoldIntoAddressingMode(I, BackupAddrMode, AddrMode)) {
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AddrModeInsts.push_back(I);
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return true;
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}
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// It isn't profitable to do this, roll back.
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//cerr << "NOT FOLDING: " << *I;
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AddrMode = BackupAddrMode;
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AddrModeInsts.resize(OldSize);
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}
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} else if (ConstantExpr *CE = dyn_cast<ConstantExpr>(Addr)) {
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if (MatchOperationAddr(CE, CE->getOpcode(), Depth))
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return true;
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} else if (isa<ConstantPointerNull>(Addr)) {
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// Null pointer gets folded without affecting the addressing mode.
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return true;
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}
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// Worse case, the target should support [reg] addressing modes. :)
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if (!AddrMode.HasBaseReg) {
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AddrMode.HasBaseReg = true;
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AddrMode.BaseReg = Addr;
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// Still check for legality in case the target supports [imm] but not [i+r].
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if (TLI.isLegalAddressingMode(AddrMode, AccessTy))
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return true;
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AddrMode.HasBaseReg = false;
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AddrMode.BaseReg = 0;
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}
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// If the base register is already taken, see if we can do [r+r].
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if (AddrMode.Scale == 0) {
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AddrMode.Scale = 1;
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AddrMode.ScaledReg = Addr;
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if (TLI.isLegalAddressingMode(AddrMode, AccessTy))
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return true;
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AddrMode.Scale = 0;
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AddrMode.ScaledReg = 0;
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}
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// Couldn't match.
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return false;
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}
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/// IsOperandAMemoryOperand - Check to see if all uses of OpVal by the specified
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/// inline asm call are due to memory operands. If so, return true, otherwise
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/// return false.
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static bool IsOperandAMemoryOperand(CallInst *CI, InlineAsm *IA, Value *OpVal,
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const TargetLowering &TLI) {
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std::vector<InlineAsm::ConstraintInfo>
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Constraints = IA->ParseConstraints();
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unsigned ArgNo = 1; // ArgNo - The operand of the CallInst.
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for (unsigned i = 0, e = Constraints.size(); i != e; ++i) {
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TargetLowering::AsmOperandInfo OpInfo(Constraints[i]);
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// Compute the value type for each operand.
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switch (OpInfo.Type) {
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case InlineAsm::isOutput:
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if (OpInfo.isIndirect)
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OpInfo.CallOperandVal = CI->getOperand(ArgNo++);
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break;
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case InlineAsm::isInput:
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OpInfo.CallOperandVal = CI->getOperand(ArgNo++);
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break;
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case InlineAsm::isClobber:
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// Nothing to do.
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break;
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}
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// Compute the constraint code and ConstraintType to use.
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TLI.ComputeConstraintToUse(OpInfo, SDValue(),
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OpInfo.ConstraintType == TargetLowering::C_Memory);
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// If this asm operand is our Value*, and if it isn't an indirect memory
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// operand, we can't fold it!
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if (OpInfo.CallOperandVal == OpVal &&
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(OpInfo.ConstraintType != TargetLowering::C_Memory ||
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!OpInfo.isIndirect))
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return false;
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}
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return true;
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}
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/// FindAllMemoryUses - Recursively walk all the uses of I until we find a
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/// memory use. If we find an obviously non-foldable instruction, return true.
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/// Add the ultimately found memory instructions to MemoryUses.
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static bool FindAllMemoryUses(Instruction *I,
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SmallVectorImpl<std::pair<Instruction*,unsigned> > &MemoryUses,
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SmallPtrSet<Instruction*, 16> &ConsideredInsts,
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const TargetLowering &TLI) {
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// If we already considered this instruction, we're done.
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if (!ConsideredInsts.insert(I))
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return false;
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// If this is an obviously unfoldable instruction, bail out.
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if (!MightBeFoldableInst(I))
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return true;
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// Loop over all the uses, recursively processing them.
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for (Value::use_iterator UI = I->use_begin(), E = I->use_end();
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UI != E; ++UI) {
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if (LoadInst *LI = dyn_cast<LoadInst>(*UI)) {
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MemoryUses.push_back(std::make_pair(LI, UI.getOperandNo()));
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continue;
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}
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if (StoreInst *SI = dyn_cast<StoreInst>(*UI)) {
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if (UI.getOperandNo() == 0) return true; // Storing addr, not into addr.
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MemoryUses.push_back(std::make_pair(SI, UI.getOperandNo()));
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continue;
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}
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if (CallInst *CI = dyn_cast<CallInst>(*UI)) {
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InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue());
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if (IA == 0) return true;
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// If this is a memory operand, we're cool, otherwise bail out.
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if (!IsOperandAMemoryOperand(CI, IA, I, TLI))
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return true;
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continue;
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}
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if (FindAllMemoryUses(cast<Instruction>(*UI), MemoryUses, ConsideredInsts,
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TLI))
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return true;
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}
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return false;
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}
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/// ValueAlreadyLiveAtInst - Retrn true if Val is already known to be live at
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/// the use site that we're folding it into. If so, there is no cost to
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/// include it in the addressing mode. KnownLive1 and KnownLive2 are two values
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/// that we know are live at the instruction already.
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bool AddressingModeMatcher::ValueAlreadyLiveAtInst(Value *Val,Value *KnownLive1,
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Value *KnownLive2) {
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// If Val is either of the known-live values, we know it is live!
|
|
if (Val == 0 || Val == KnownLive1 || Val == KnownLive2)
|
|
return true;
|
|
|
|
// All values other than instructions and arguments (e.g. constants) are live.
|
|
if (!isa<Instruction>(Val) && !isa<Argument>(Val)) return true;
|
|
|
|
// If Val is a constant sized alloca in the entry block, it is live, this is
|
|
// true because it is just a reference to the stack/frame pointer, which is
|
|
// live for the whole function.
|
|
if (AllocaInst *AI = dyn_cast<AllocaInst>(Val))
|
|
if (AI->isStaticAlloca())
|
|
return true;
|
|
|
|
// Check to see if this value is already used in the memory instruction's
|
|
// block. If so, it's already live into the block at the very least, so we
|
|
// can reasonably fold it.
|
|
BasicBlock *MemBB = MemoryInst->getParent();
|
|
for (Value::use_iterator UI = Val->use_begin(), E = Val->use_end();
|
|
UI != E; ++UI)
|
|
// We know that uses of arguments and instructions have to be instructions.
|
|
if (cast<Instruction>(*UI)->getParent() == MemBB)
|
|
return true;
|
|
|
|
return false;
|
|
}
|
|
|
|
|
|
|
|
/// IsProfitableToFoldIntoAddressingMode - It is possible for the addressing
|
|
/// mode of the machine to fold the specified instruction into a load or store
|
|
/// that ultimately uses it. However, the specified instruction has multiple
|
|
/// uses. Given this, it may actually increase register pressure to fold it
|
|
/// into the load. For example, consider this code:
|
|
///
|
|
/// X = ...
|
|
/// Y = X+1
|
|
/// use(Y) -> nonload/store
|
|
/// Z = Y+1
|
|
/// load Z
|
|
///
|
|
/// In this case, Y has multiple uses, and can be folded into the load of Z
|
|
/// (yielding load [X+2]). However, doing this will cause both "X" and "X+1" to
|
|
/// be live at the use(Y) line. If we don't fold Y into load Z, we use one
|
|
/// fewer register. Since Y can't be folded into "use(Y)" we don't increase the
|
|
/// number of computations either.
|
|
///
|
|
/// Note that this (like most of CodeGenPrepare) is just a rough heuristic. If
|
|
/// X was live across 'load Z' for other reasons, we actually *would* want to
|
|
/// fold the addressing mode in the Z case. This would make Y die earlier.
|
|
bool AddressingModeMatcher::
|
|
IsProfitableToFoldIntoAddressingMode(Instruction *I, ExtAddrMode &AMBefore,
|
|
ExtAddrMode &AMAfter) {
|
|
if (IgnoreProfitability) return true;
|
|
|
|
// AMBefore is the addressing mode before this instruction was folded into it,
|
|
// and AMAfter is the addressing mode after the instruction was folded. Get
|
|
// the set of registers referenced by AMAfter and subtract out those
|
|
// referenced by AMBefore: this is the set of values which folding in this
|
|
// address extends the lifetime of.
|
|
//
|
|
// Note that there are only two potential values being referenced here,
|
|
// BaseReg and ScaleReg (global addresses are always available, as are any
|
|
// folded immediates).
|
|
Value *BaseReg = AMAfter.BaseReg, *ScaledReg = AMAfter.ScaledReg;
|
|
|
|
// If the BaseReg or ScaledReg was referenced by the previous addrmode, their
|
|
// lifetime wasn't extended by adding this instruction.
|
|
if (ValueAlreadyLiveAtInst(BaseReg, AMBefore.BaseReg, AMBefore.ScaledReg))
|
|
BaseReg = 0;
|
|
if (ValueAlreadyLiveAtInst(ScaledReg, AMBefore.BaseReg, AMBefore.ScaledReg))
|
|
ScaledReg = 0;
|
|
|
|
// If folding this instruction (and it's subexprs) didn't extend any live
|
|
// ranges, we're ok with it.
|
|
if (BaseReg == 0 && ScaledReg == 0)
|
|
return true;
|
|
|
|
// If all uses of this instruction are ultimately load/store/inlineasm's,
|
|
// check to see if their addressing modes will include this instruction. If
|
|
// so, we can fold it into all uses, so it doesn't matter if it has multiple
|
|
// uses.
|
|
SmallVector<std::pair<Instruction*,unsigned>, 16> MemoryUses;
|
|
SmallPtrSet<Instruction*, 16> ConsideredInsts;
|
|
if (FindAllMemoryUses(I, MemoryUses, ConsideredInsts, TLI))
|
|
return false; // Has a non-memory, non-foldable use!
|
|
|
|
// Now that we know that all uses of this instruction are part of a chain of
|
|
// computation involving only operations that could theoretically be folded
|
|
// into a memory use, loop over each of these uses and see if they could
|
|
// *actually* fold the instruction.
|
|
SmallVector<Instruction*, 32> MatchedAddrModeInsts;
|
|
for (unsigned i = 0, e = MemoryUses.size(); i != e; ++i) {
|
|
Instruction *User = MemoryUses[i].first;
|
|
unsigned OpNo = MemoryUses[i].second;
|
|
|
|
// Get the access type of this use. If the use isn't a pointer, we don't
|
|
// know what it accesses.
|
|
Value *Address = User->getOperand(OpNo);
|
|
if (!Address->getType()->isPointerTy())
|
|
return false;
|
|
const Type *AddressAccessTy =
|
|
cast<PointerType>(Address->getType())->getElementType();
|
|
|
|
// Do a match against the root of this address, ignoring profitability. This
|
|
// will tell us if the addressing mode for the memory operation will
|
|
// *actually* cover the shared instruction.
|
|
ExtAddrMode Result;
|
|
AddressingModeMatcher Matcher(MatchedAddrModeInsts, TLI, AddressAccessTy,
|
|
MemoryInst, Result);
|
|
Matcher.IgnoreProfitability = true;
|
|
bool Success = Matcher.MatchAddr(Address, 0);
|
|
Success = Success; assert(Success && "Couldn't select *anything*?");
|
|
|
|
// If the match didn't cover I, then it won't be shared by it.
|
|
if (std::find(MatchedAddrModeInsts.begin(), MatchedAddrModeInsts.end(),
|
|
I) == MatchedAddrModeInsts.end())
|
|
return false;
|
|
|
|
MatchedAddrModeInsts.clear();
|
|
}
|
|
|
|
return true;
|
|
}
|