llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-01 00:11:00 +00:00

History

Daniel Sanders 67f6425792 Add infrastructure for support of multiple memory constraints. Summary: The operand flag word for ISD::INLINEASM nodes now contains a 15-bit memory constraint ID when the operand kind is Kind_Mem. This constraint ID is a numeric equivalent to the constraint code string and is converted with a target specific hook in TargetLowering. This patch maps all memory constraints to InlineAsm::Constraint_m so there is no functional change at this point. It just proves that using these previously unused bits in the encoding of the flag word doesn't break anything. The next patch will make each target preserve the current mapping of everything to Constraint_m for itself while changing the target independent implementation of the hook to return Constraint_Unknown appropriately. Each target will then be adapted in separate patches to use appropriate Constraint_* values. Reviewers: hfinkel Reviewed By: hfinkel Subscribers: hfinkel, jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D8171 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232027 91177308-0d34-0410-b5e6-96231b3b80d8		2015-03-12 11:00:48 +00:00
..
Disassembler
InstPrinter
MCTargetDesc	TableGen: Use 'enum : uint64_t' for feature flags to fix -Wmicrosoft	2015-03-09 20:23:14 +00:00
TargetInfo
CMakeLists.txt
LLVMBuild.txt
Makefile
README.txt
XCore.h
XCore.td
XCoreAsmPrinter.cpp
XCoreCallingConv.td
XCoreFrameLowering.cpp
XCoreFrameLowering.h
XCoreFrameToArgsOffsetElim.cpp
XCoreInstrFormats.td
XCoreInstrInfo.cpp
XCoreInstrInfo.h
XCoreInstrInfo.td
XCoreISelDAGToDAG.cpp	Add infrastructure for support of multiple memory constraints.	2015-03-12 11:00:48 +00:00
XCoreISelLowering.cpp	getRegForInlineAsmConstraint wants to use TargetRegisterInfo for	2015-02-26 22:38:43 +00:00
XCoreISelLowering.h	getRegForInlineAsmConstraint wants to use TargetRegisterInfo for	2015-02-26 22:38:43 +00:00
XCoreLowerThreadLocal.cpp
XCoreMachineFunctionInfo.cpp
XCoreMachineFunctionInfo.h
XCoreMCInstLower.cpp
XCoreMCInstLower.h
XCoreRegisterInfo.cpp	Have getCalleeSavedRegs take a non-null MachineFunction all the	2015-03-11 21:41:28 +00:00
XCoreRegisterInfo.h	Have getCalleeSavedRegs take a non-null MachineFunction all the	2015-03-11 21:41:28 +00:00
XCoreRegisterInfo.td
XCoreSelectionDAGInfo.cpp
XCoreSelectionDAGInfo.h
XCoreSubtarget.cpp
XCoreSubtarget.h
XCoreTargetMachine.cpp	Move the DataLayout to the generic TargetMachine, making it mandatory.	2015-03-12 00:07:24 +00:00
XCoreTargetMachine.h	Move the DataLayout to the generic TargetMachine, making it mandatory.	2015-03-12 00:07:24 +00:00
XCoreTargetObjectFile.cpp
XCoreTargetObjectFile.h
XCoreTargetStreamer.h
XCoreTargetTransformInfo.h

README.txt

To-do
-----

* Instruction encodings
* Tailcalls
* Investigate loop alignment
* Add builtins