llvm-6502/test/MC
NAKAMURA Takumi 398daae4cc test/MC/AsmParser/2011-09-06-NoNewline.s: Add explicit -mtriple=i386. It uses X86 instruction.
FIXME: Would it be reproduced without target-specific operands?
FIXME: Why run llvm-mc as the same input by 3 times?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143195 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-28 14:12:30 +00:00
..
ARM ARM Allow 'q' registers in VLD/VST vector lists. 2011-10-28 00:06:50 +00:00
AsmParser test/MC/AsmParser/2011-09-06-NoNewline.s: Add explicit -mtriple=i386. It uses X86 instruction. 2011-10-28 14:12:30 +00:00
COFF
Disassembler
ELF
MachO
MBlaze
X86