llvm-6502/add-of-carry.ll at be7c5116a754b4c539b4e385006452af13fe6df1 - llvm-6502 - Applefritter: Git

6502/llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-04 22:29:22 +00:00

Owen Anderson c004eec71b When adding the carry bit to another value on X86, exploit the fact that the carry-materialization

(sbbl x, x) sets the registers to 0 or ~0.  Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.

This fixes <rdar://problem/8449754>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114460 91177308-0d34-0410-b5e6-96231b3b80d8

2010-09-21 18:41:19 +00:00

15 lines

344 B

LLVM

Raw Blame History

 ; RUN: llc < %s -march=x86 | FileCheck %s
 ; <rdar://problem/8449754>
 define i32 @add32carry(i32 %sum, i32 %x) nounwind readnone ssp {
 entry:
 ; CHECK:	sbbl	%ecx, %ecx
 ; CHECK-NOT: addl
 ; CHECK: subl	%ecx, %eax
   %add4 = add i32 %x, %sum
   %cmp = icmp ult i32 %add4, %x
   %inc = zext i1 %cmp to i32
   %z.0 = add i32 %add4, %inc
   ret i32 %z.0
 }