llvm-6502/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll
Simon Atanasyan c5e99819f4 [Mips] Adjust float ABI settings in case of MIPS16 mode.
Hard float for mips16 means essentially to compile as soft float but to
use a runtime library for soft float that is written with native mips32
floating point instructions (those runtime routines run in mips32 hard
float mode).

The patch reviewed by Reed Kotler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195123 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-19 12:20:17 +00:00

19 lines
489 B
LLVM

; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s
; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips32r2 -mattr=+mips16 < %s | FileCheck %s
define signext i8 @A(i8 %e.0, i8 signext %sum) nounwind {
entry:
; CHECK: seb
add i8 %sum, %e.0 ; <i8>:0 [#uses=1]
ret i8 %0
}
define signext i16 @B(i16 %e.0, i16 signext %sum) nounwind {
entry:
; CHECK: seh
add i16 %sum, %e.0 ; <i16>:0 [#uses=1]
ret i16 %0
}