mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
66 lines
3.3 KiB
LLVM
66 lines
3.3 KiB
LLVM
; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -optimize-regalloc=0 | FileCheck %s
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; RUN: llc -O0 < %s -march=x86 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast | FileCheck %s
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; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 -mcpu=atom -regalloc=fast -optimize-regalloc=0 | FileCheck -check-prefix=ATOM %s
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; CHECKed instructions should be the same with or without -O0 except on Intel Atom due to instruction scheduling.
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@.str = private constant [12 x i8] c"x + y = %i\0A\00", align 1 ; <[12 x i8]*> [#uses=1]
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define i32 @main() nounwind {
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entry:
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; CHECK: movl 24(%esp), %eax
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; CHECK-NOT: movl
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; CHECK: movl %eax, 36(%esp)
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; CHECK-NOT: movl
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; CHECK: movl 28(%esp), %ebx
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; CHECK-NOT: movl
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; CHECK: movl %ebx, 40(%esp)
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; CHECK-NOT: movl
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; CHECK: addl %ebx, %eax
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; On Intel Atom the scheduler moves a movl instruction
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; used for the printf call to follow movl 24(%esp), %eax
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; ATOM: movl 24(%esp), %eax
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; ATOM: movl
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; ATOM: movl %eax, 36(%esp)
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; ATOM-NOT: movl
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; ATOM: movl 28(%esp), %ebx
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; ATOM-NOT: movl
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; ATOM: movl %ebx, 40(%esp)
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; ATOM-NOT: movl
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; ATOM: addl %ebx, %eax
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%retval = alloca i32 ; <i32*> [#uses=2]
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%"%ebx" = alloca i32 ; <i32*> [#uses=1]
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%"%eax" = alloca i32 ; <i32*> [#uses=2]
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%result = alloca i32 ; <i32*> [#uses=2]
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%y = alloca i32 ; <i32*> [#uses=2]
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%x = alloca i32 ; <i32*> [#uses=2]
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%0 = alloca i32 ; <i32*> [#uses=2]
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%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
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store i32 1, i32* %x, align 4
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store i32 2, i32* %y, align 4
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call void asm sideeffect alignstack "# top of block", "~{dirflag},~{fpsr},~{flags},~{edi},~{esi},~{edx},~{ecx},~{eax}"() nounwind
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%asmtmp = call i32 asm sideeffect alignstack "movl $1, $0", "=={eax},*m,~{dirflag},~{fpsr},~{flags},~{memory}"(i32* %x) nounwind ; <i32> [#uses=1]
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store i32 %asmtmp, i32* %"%eax"
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%asmtmp1 = call i32 asm sideeffect alignstack "movl $1, $0", "=={ebx},*m,~{dirflag},~{fpsr},~{flags},~{memory}"(i32* %y) nounwind ; <i32> [#uses=1]
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store i32 %asmtmp1, i32* %"%ebx"
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%1 = call i32 asm "", "={bx}"() nounwind ; <i32> [#uses=1]
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%2 = call i32 asm "", "={ax}"() nounwind ; <i32> [#uses=1]
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%asmtmp2 = call i32 asm sideeffect alignstack "addl $1, $0", "=={eax},{ebx},{eax},~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %1, i32 %2) nounwind ; <i32> [#uses=1]
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store i32 %asmtmp2, i32* %"%eax"
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%3 = call i32 asm "", "={ax}"() nounwind ; <i32> [#uses=1]
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call void asm sideeffect alignstack "movl $0, $1", "{eax},*m,~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %3, i32* %result) nounwind
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%4 = load i32, i32* %result, align 4 ; <i32> [#uses=1]
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%5 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), i32 %4) nounwind ; <i32> [#uses=0]
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store i32 0, i32* %0, align 4
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%6 = load i32, i32* %0, align 4 ; <i32> [#uses=1]
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store i32 %6, i32* %retval, align 4
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br label %return
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return: ; preds = %entry
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%retval3 = load i32, i32* %retval ; <i32> [#uses=1]
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ret i32 %retval3
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}
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declare i32 @printf(i8*, ...) nounwind
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