mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 20:29:48 +00:00
29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
101 lines
2.7 KiB
LLVM
101 lines
2.7 KiB
LLVM
; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s
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; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64_be-linux-gnu | FileCheck %s --check-prefix=CHECK-BE
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define void @call0() nounwind {
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entry:
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ret void
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}
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define void @foo0() nounwind {
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entry:
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; CHECK: foo0
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; CHECK: bl _call0
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call void @call0()
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ret void
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}
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define i32 @call1(i32 %a) nounwind {
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entry:
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%a.addr = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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%tmp = load i32* %a.addr, align 4
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ret i32 %tmp
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}
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define i32 @foo1(i32 %a) nounwind {
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entry:
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; CHECK: foo1
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; CHECK: stur w0, [x29, #-4]
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; CHECK-NEXT: ldur w0, [x29, #-4]
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; CHECK-NEXT: bl _call1
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%a.addr = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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%tmp = load i32* %a.addr, align 4
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%call = call i32 @call1(i32 %tmp)
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ret i32 %call
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}
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define i32 @sext_(i8 %a, i16 %b) nounwind {
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entry:
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; CHECK: @sext_
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; CHECK: sxtb w0, w0
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; CHECK: sxth w1, w1
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; CHECK: bl _foo_sext_
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call void @foo_sext_(i8 signext %a, i16 signext %b)
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ret i32 0
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}
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declare void @foo_sext_(i8 %a, i16 %b)
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define i32 @zext_(i8 %a, i16 %b) nounwind {
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entry:
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; CHECK: @zext_
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; CHECK: uxtb w0, w0
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; CHECK: uxth w1, w1
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call void @foo_zext_(i8 zeroext %a, i16 zeroext %b)
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ret i32 0
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}
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declare void @foo_zext_(i8 %a, i16 %b)
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define i32 @t1(i32 %argc, i8** nocapture %argv) {
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entry:
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; CHECK: @t1
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; The last parameter will be passed on stack via i8.
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; CHECK: strb w{{[0-9]+}}, [sp]
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; CHECK-NEXT: bl _bar
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%call = call i32 @bar(i8 zeroext 0, i8 zeroext -8, i8 zeroext -69, i8 zeroext 28, i8 zeroext 40, i8 zeroext -70, i8 zeroext 28, i8 zeroext 39, i8 zeroext -41)
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ret i32 0
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}
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declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext)
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; Test materialization of integers. Target-independent selector handles this.
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define i32 @t2() {
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entry:
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; CHECK: @t2
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; CHECK: movz x0, #0
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; CHECK: orr w1, wzr, #0xfffffff8
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; CHECK: orr w[[REG:[0-9]+]], wzr, #0x3ff
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; CHECK: orr w[[REG2:[0-9]+]], wzr, #0x2
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; CHECK: movz w[[REG3:[0-9]+]], #0
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; CHECK: orr w[[REG4:[0-9]+]], wzr, #0x1
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; CHECK: uxth w2, w[[REG]]
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; CHECK: sxtb w3, w[[REG2]]
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; CHECK: and w4, w[[REG3]], #0x1
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; CHECK: and w5, w[[REG4]], #0x1
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; CHECK: bl _func2
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%call = call i32 @func2(i64 zeroext 0, i32 signext -8, i16 zeroext 1023, i8 signext -254, i1 zeroext 0, i1 zeroext 1)
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ret i32 0
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}
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declare i32 @func2(i64 zeroext, i32 signext, i16 zeroext, i8 signext, i1 zeroext, i1 zeroext)
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declare void @callee_b0f(i8 %bp10, i8 %bp11, i8 %bp12, i8 %bp13, i8 %bp14, i8 %bp15, i8 %bp17, i8 %bp18, i8 %bp19)
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define void @caller_b1f() {
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entry:
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; CHECK-BE: strb w{{.*}}, [sp, #7]
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call void @callee_b0f(i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 42)
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ret void
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}
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