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llvm-6502/lib/Target/AArch64
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Daniel Sanders 67f6425792 Add infrastructure for support of multiple memory constraints. 
Summary:
The operand flag word for ISD::INLINEASM nodes now contains a 15-bit
memory constraint ID when the operand kind is Kind_Mem. This constraint
ID is a numeric equivalent to the constraint code string and is converted
with a target specific hook in TargetLowering.

This patch maps all memory constraints to InlineAsm::Constraint_m so there
is no functional change at this point. It just proves that using these
previously unused bits in the encoding of the flag word doesn't break anything.

The next patch will make each target preserve the current mapping of
everything to Constraint_m for itself while changing the target independent
implementation of the hook to return Constraint_Unknown appropriately. Each
target will then be adapted in separate patches to use appropriate Constraint_*
values.

Reviewers: hfinkel

Reviewed By: hfinkel

Subscribers: hfinkel, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D8171


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232027 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-12 11:00:48 +00:00
..
AsmParser Make static variables const if possible. Makes them go into a read-only section. 2015-03-08 16:07:39 +00:00
Disassembler unique_ptrify the RelInfo parameter to TargetRegistry::createMCSymbolizer 2015-01-18 20:45:48 +00:00
InstPrinter
MCTargetDesc Remove the use of the subtarget in MCCodeEmitter creation and 2015-03-10 22:03:14 +00:00
TargetInfo
Utils Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers cannot handle yet. 2015-03-04 09:12:08 +00:00
AArch64.h [PM] Remove a bunch of stale TTI creation method declarations. I nuked 2015-02-01 00:22:15 +00:00
AArch64.td Adding support to LLVM for targeting Cortex-A72 2015-02-04 13:31:29 +00:00
AArch64A53Fix835769.cpp Clean up some uses of getSubtarget in AArch64. 2015-01-30 01:10:24 +00:00
AArch64A57FPLoadBalancing.cpp Remove subtarget dependence in pass pipeline setup for AArch64. 2015-03-03 23:22:40 +00:00
AArch64AddressTypePromotion.cpp
AArch64AdvSIMDScalarPass.cpp This only needs TargetInstrInfo, not the specialized one. 2015-01-30 01:10:18 +00:00
AArch64AsmPrinter.cpp [AArch64] Teach AsmPrinter about GlobalAddress operands. 2015-03-05 20:04:21 +00:00
AArch64BranchRelaxation.cpp Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl. 2015-01-28 03:51:33 +00:00
AArch64CallingConvention.h Move DataLayout back to the TargetMachine from TargetSubtargetInfo 2015-01-26 19:03:15 +00:00
AArch64CallingConvention.td Move DataLayout back to the TargetMachine from TargetSubtargetInfo 2015-01-26 19:03:15 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers cannot handle yet. 2015-03-04 09:12:08 +00:00
AArch64CollectLOH.cpp Constify AArch64CollectLOH.cpp. NFC 2015-03-11 21:40:25 +00:00
AArch64ConditionalCompares.cpp AArch64: Canonicalize access to function attributes, NFC 2015-02-14 02:09:06 +00:00
AArch64ConditionOptimizer.cpp Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl. 2015-01-28 03:51:33 +00:00
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp MathExtras: Bring Count(Trailing|Leading)Ones and CountPopulation in line with countTrailingZeros 2015-02-12 15:35:40 +00:00
AArch64FastISel.cpp Have getCallPreservedMask and getThisCallPreservedMask take a 2015-03-11 22:42:13 +00:00
AArch64FrameLowering.cpp AArch64: Canonicalize access to function attributes, NFC 2015-02-14 02:09:06 +00:00
AArch64FrameLowering.h
AArch64InstrAtomics.td
AArch64InstrFormats.td Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files. 2014-11-26 00:46:26 +00:00
AArch64InstrInfo.cpp Remove the need to cache the subtarget in the AArch64 TargetRegisterInfo 2015-03-12 02:04:46 +00:00
AArch64InstrInfo.h ArrayRefize memory operand folding. NFC. 2015-02-28 12:04:00 +00:00
AArch64InstrInfo.td [AArch64] Avoid going through GPRs for across-vector instructions. 2015-03-10 20:45:38 +00:00
AArch64ISelDAGToDAG.cpp Add infrastructure for support of multiple memory constraints. 2015-03-12 11:00:48 +00:00
AArch64ISelLowering.cpp Have getCallPreservedMask and getThisCallPreservedMask take a 2015-03-11 22:42:13 +00:00
AArch64ISelLowering.h [AArch64] Avoid going through GPRs for across-vector instructions. 2015-03-10 20:45:38 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64][LoadStoreOptimizer] Generate LDP + SXTW instead of LD[U]R + LD[U]RSW. 2015-03-06 22:42:10 +00:00
AArch64MachineCombinerPattern.h
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers cannot handle yet. 2015-03-04 09:12:08 +00:00
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp Avoid copying LiveInterval, this could lead to a double-delete 2015-03-03 22:25:48 +00:00
AArch64PBQPRegAlloc.h [AArch64] Cleanup A57PBQPConstraints 2014-10-22 12:40:20 +00:00
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp [AArch64] fix an invalid-iterator-use bug. 2015-03-02 00:17:18 +00:00
AArch64RegisterInfo.cpp Remove the need to cache the subtarget in the AArch64 TargetRegisterInfo 2015-03-12 02:04:46 +00:00
AArch64RegisterInfo.h Remove the need to cache the subtarget in the AArch64 TargetRegisterInfo 2015-03-12 02:04:46 +00:00
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp Get the cached subtarget off the MachineFunction rather than 2015-02-20 08:39:06 +00:00
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp Clean up the AArch64 store pair suppression pass initialization 2015-01-27 07:54:36 +00:00
AArch64Subtarget.cpp Remove getSubtargetImpl from AArch64ISelLowering and cache the 2015-01-29 00:19:42 +00:00
AArch64Subtarget.h Remove the need to cache the subtarget in the AArch64 TargetRegisterInfo 2015-03-12 02:04:46 +00:00
AArch64TargetMachine.cpp Move the DataLayout to the generic TargetMachine, making it mandatory. 2015-03-12 00:07:24 +00:00
AArch64TargetMachine.h Move the DataLayout to the generic TargetMachine, making it mandatory. 2015-03-12 00:07:24 +00:00
AArch64TargetObjectFile.cpp [AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents 2015-03-06 13:49:05 +00:00
AArch64TargetObjectFile.h [AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents 2015-03-06 13:49:05 +00:00
AArch64TargetTransformInfo.cpp [AArch64] Enable partial & runtime unrolling on cortex-a57 2015-03-09 06:14:28 +00:00
AArch64TargetTransformInfo.h [multiversion] Remove the function parameter from the unrolling 2015-02-01 14:31:23 +00:00
CMakeLists.txt [AArch64] Add workaround for Cortex-A53 erratum (835769) 2014-10-13 10:12:35 +00:00
LLVMBuild.txt
Makefile