llvm-6502/test/CodeGen
2013-06-29 19:32:43 +00:00
..
AArch64 AArch64: remove accidental test output file. 2013-06-18 21:16:53 +00:00
ARM Add missing case to switch statement - DAGTypeLegalizer::ExpandIntegerResult 2013-06-28 18:36:42 +00:00
CPP test commit: remove blank line. 2013-03-14 05:43:59 +00:00
Generic Debug Info: clean up usage of Verify. 2013-06-28 05:43:10 +00:00
Hexagon Hexagon: Pass to replace tranfer/copy instructions into combine instruction 2013-05-14 18:54:06 +00:00
Inputs Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
MBlaze Remove unnecessary leading comment characters in lit-only file 2013-03-18 22:08:16 +00:00
Mips [mips] Improve code generation for constant multiplication using shifts, adds and 2013-06-26 18:48:17 +00:00
MSP430 DAGCombiner: Simplify inverted bit tests 2013-05-08 06:44:42 +00:00
NVPTX [NVPTX] Add (1.0 / sqrt(x)) => rsqrt(x) generation when allowable by FP flags 2013-06-28 17:58:13 +00:00
PowerPC PPC: Ignore spill/restore requests for VRSAVE (except on Darwin) 2013-06-28 22:29:56 +00:00
R600 R600: Support schedule and packetization of trans-only inst 2013-06-29 19:32:43 +00:00
SI
SPARC Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo. 2013-06-17 19:00:36 +00:00
SystemZ [SystemZ] Fix some embarrassing test typos 2013-06-27 09:49:34 +00:00
Thumb LocalStackSlotAllocation improvements 2013-04-30 20:04:37 +00:00
Thumb2 ARM: allow predicated barriers in Thumb mode 2013-06-26 16:52:32 +00:00
X86 Debug Info: clean up usage of Verify. 2013-06-28 05:43:10 +00:00
XCore [XCore] Fix handling of functions where only the LR is spilled. 2013-05-09 16:43:42 +00:00