llvm-6502/test/CodeGen/X86/sse42.ll
Jakob Stoklund Olesen 61396aebee Fix a batch of x86 tests to be coalescer independent.
Most of these tests require a single mov instruction that can come either before
or after a 2-addr instruction. -join-physregs changes the behavior, but the
results are equivalent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 23:54:51 +00:00

39 lines
1010 B
LLVM

; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X64
declare i32 @llvm.x86.sse42.crc32.8(i32, i8) nounwind
declare i32 @llvm.x86.sse42.crc32.16(i32, i16) nounwind
declare i32 @llvm.x86.sse42.crc32.32(i32, i32) nounwind
define i32 @crc32_8(i32 %a, i8 %b) nounwind {
%tmp = call i32 @llvm.x86.sse42.crc32.8(i32 %a, i8 %b)
ret i32 %tmp
; X32: _crc32_8:
; X32: crc32b 8(%esp), %eax
; X64: _crc32_8:
; X64: crc32b %sil,
}
define i32 @crc32_16(i32 %a, i16 %b) nounwind {
%tmp = call i32 @llvm.x86.sse42.crc32.16(i32 %a, i16 %b)
ret i32 %tmp
; X32: _crc32_16:
; X32: crc32w 8(%esp), %eax
; X64: _crc32_16:
; X64: crc32w %si,
}
define i32 @crc32_32(i32 %a, i32 %b) nounwind {
%tmp = call i32 @llvm.x86.sse42.crc32.32(i32 %a, i32 %b)
ret i32 %tmp
; X32: _crc32_32:
; X32: crc32l 8(%esp), %eax
; X64: _crc32_32:
; X64: crc32l %esi,
}