mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-02 07:11:49 +00:00
438669ca81
This adds target specific support for using the PBQP register allocator on the AArch64, for the A57 cpu. By default, the PBQP allocator is not used, unless explicitely required on the command line with "-aarch64-pbqp". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217504 91177308-0d34-0410-b5e6-96231b3b80d8
55 lines
1.8 KiB
CMake
55 lines
1.8 KiB
CMake
set(LLVM_TARGET_DEFINITIONS AArch64.td)
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tablegen(LLVM AArch64GenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter)
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tablegen(LLVM AArch64GenMCPseudoLowering.inc -gen-pseudo-lowering)
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tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
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tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
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tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
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tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
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tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
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add_public_tablegen_target(AArch64CommonTableGen)
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add_llvm_target(AArch64CodeGen
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AArch64A57FPLoadBalancing.cpp
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AArch64AddressTypePromotion.cpp
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AArch64AdvSIMDScalarPass.cpp
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AArch64AsmPrinter.cpp
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AArch64BranchRelaxation.cpp
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AArch64CleanupLocalDynamicTLSPass.cpp
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AArch64CollectLOH.cpp
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AArch64ConditionalCompares.cpp
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AArch64DeadRegisterDefinitionsPass.cpp
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AArch64ExpandPseudoInsts.cpp
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AArch64FastISel.cpp
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AArch64FrameLowering.cpp
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AArch64ConditionOptimizer.cpp
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AArch64ISelDAGToDAG.cpp
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AArch64ISelLowering.cpp
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AArch64InstrInfo.cpp
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AArch64LoadStoreOptimizer.cpp
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AArch64MCInstLower.cpp
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AArch64PromoteConstant.cpp
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AArch64PBQPRegAlloc.cpp
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AArch64RegisterInfo.cpp
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AArch64SelectionDAGInfo.cpp
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AArch64StorePairSuppress.cpp
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AArch64Subtarget.cpp
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AArch64TargetMachine.cpp
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AArch64TargetObjectFile.cpp
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AArch64TargetTransformInfo.cpp
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)
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add_dependencies(LLVMAArch64CodeGen intrinsics_gen)
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add_subdirectory(TargetInfo)
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add_subdirectory(AsmParser)
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add_subdirectory(Disassembler)
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add_subdirectory(InstPrinter)
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add_subdirectory(MCTargetDesc)
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add_subdirectory(Utils)
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