llvm-6502/test/CodeGen
Chandler Carruth bf21d40070 [x86] Teach the new vector shuffle lowering to widen floating point
elements as well as integer elements in order to form simpler shuffle
patterns.

This is the primary reason why we were failing to match some of the
2-and-2 floating point shuffles such as PR21140. Even after fixing this
we need to support some extra patterns in the backend in order to match
the resulting X86ISD::UNPCKL nodes into the correct instructions. This
commit should fix PR21140 and includes more comprehensive testing of
insertion patterns in v4 shuffles.

Not all of the added tests are beautiful. For example, we don't have
clever instructions to insert-via-load in the integer domain. There are
also some places where we aren't sufficiently cunning with our use of
movq and movd, but that's future work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218911 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-02 21:37:14 +00:00
..
AArch64 Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
ARM ARM: allow copying of CPSR when all else fails. 2014-10-01 19:21:03 +00:00
CPP
Generic ARM: yes it can (as of r218789) 2014-10-01 20:31:58 +00:00
Hexagon Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
Inputs Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
Mips Add fptrunc to mips fast-sel 2014-10-01 18:47:02 +00:00
MSP430 Drop the W postfix on the 16-bit registers. 2014-09-10 06:58:14 +00:00
NVPTX Revert r216862 due to a performance regression 2014-10-01 15:22:13 +00:00
PowerPC Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
R600 R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol table 2014-10-01 17:15:17 +00:00
SPARC Add back tests for empty function in SPARC and PowerPC. 2014-09-15 22:11:07 +00:00
SystemZ
Thumb Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
Thumb2 [ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5 2014-10-01 13:13:18 +00:00
X86 [x86] Teach the new vector shuffle lowering to widen floating point 2014-10-02 21:37:14 +00:00
XCore Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00