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29f198c9bf
This seems to me an obvious place to allow target passes to annotate memory operations. There are plenty of bits, and I'm not aware of another good way for early target passes to propagate hints along to later passes. Target independent transforms can simply preserve them, the way they preserve the other flags. Like MachineMemOperands in general, if the target flags are lost we must still generate correct code. This has lots of uses, but I want this flexibility now to make it easier to work with the new MachineTraceMetrics analysis. MachineTraceMetrics can gather a lot of information about instructions based on the surrounding code. This information can be used to influence postRA machine passes that don't work on SSA form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180666 91177308-0d34-0410-b5e6-96231b3b80d8
190 lines
7.2 KiB
C++
190 lines
7.2 KiB
C++
//==- llvm/CodeGen/MachineMemOperand.h - MachineMemOperand class -*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declaration of the MachineMemOperand class, which is a
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// description of a memory reference. It is used to help track dependencies
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// in the backend.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MACHINEMEMOPERAND_H
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#define LLVM_CODEGEN_MACHINEMEMOPERAND_H
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#include "llvm/Support/DataTypes.h"
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namespace llvm {
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class Value;
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class FoldingSetNodeID;
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class MDNode;
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class raw_ostream;
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/// MachinePointerInfo - This class contains a discriminated union of
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/// information about pointers in memory operands, relating them back to LLVM IR
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/// or to virtual locations (such as frame indices) that are exposed during
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/// codegen.
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struct MachinePointerInfo {
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/// V - This is the IR pointer value for the access, or it is null if unknown.
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/// If this is null, then the access is to a pointer in the default address
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/// space.
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const Value *V;
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/// Offset - This is an offset from the base Value*.
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int64_t Offset;
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explicit MachinePointerInfo(const Value *v = 0, int64_t offset = 0)
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: V(v), Offset(offset) {}
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MachinePointerInfo getWithOffset(int64_t O) const {
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if (V == 0) return MachinePointerInfo(0, 0);
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return MachinePointerInfo(V, Offset+O);
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}
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/// getAddrSpace - Return the LLVM IR address space number that this pointer
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/// points into.
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unsigned getAddrSpace() const;
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/// getConstantPool - Return a MachinePointerInfo record that refers to the
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/// constant pool.
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static MachinePointerInfo getConstantPool();
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/// getFixedStack - Return a MachinePointerInfo record that refers to the
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/// the specified FrameIndex.
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static MachinePointerInfo getFixedStack(int FI, int64_t offset = 0);
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/// getJumpTable - Return a MachinePointerInfo record that refers to a
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/// jump table entry.
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static MachinePointerInfo getJumpTable();
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/// getGOT - Return a MachinePointerInfo record that refers to a
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/// GOT entry.
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static MachinePointerInfo getGOT();
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/// getStack - stack pointer relative access.
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static MachinePointerInfo getStack(int64_t Offset);
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};
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//===----------------------------------------------------------------------===//
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/// MachineMemOperand - A description of a memory reference used in the backend.
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/// Instead of holding a StoreInst or LoadInst, this class holds the address
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/// Value of the reference along with a byte size and offset. This allows it
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/// to describe lowered loads and stores. Also, the special PseudoSourceValue
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/// objects can be used to represent loads and stores to memory locations
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/// that aren't explicit in the regular LLVM IR.
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///
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class MachineMemOperand {
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MachinePointerInfo PtrInfo;
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uint64_t Size;
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unsigned Flags;
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const MDNode *TBAAInfo;
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const MDNode *Ranges;
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public:
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/// Flags values. These may be or'd together.
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enum MemOperandFlags {
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/// The memory access reads data.
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MOLoad = 1,
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/// The memory access writes data.
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MOStore = 2,
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/// The memory access is volatile.
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MOVolatile = 4,
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/// The memory access is non-temporal.
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MONonTemporal = 8,
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/// The memory access is invariant.
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MOInvariant = 16,
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// Target hints allow target passes to annotate memory operations.
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MOTargetStartBit = 5,
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MOTargetNumBits = 3,
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// This is the number of bits we need to represent flags.
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MOMaxBits = 8
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};
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/// MachineMemOperand - Construct an MachineMemOperand object with the
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/// specified PtrInfo, flags, size, and base alignment.
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MachineMemOperand(MachinePointerInfo PtrInfo, unsigned flags, uint64_t s,
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unsigned base_alignment, const MDNode *TBAAInfo = 0,
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const MDNode *Ranges = 0);
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const MachinePointerInfo &getPointerInfo() const { return PtrInfo; }
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/// getValue - Return the base address of the memory access. This may either
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/// be a normal LLVM IR Value, or one of the special values used in CodeGen.
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/// Special values are those obtained via
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/// PseudoSourceValue::getFixedStack(int), PseudoSourceValue::getStack, and
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/// other PseudoSourceValue member functions which return objects which stand
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/// for frame/stack pointer relative references and other special references
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/// which are not representable in the high-level IR.
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const Value *getValue() const { return PtrInfo.V; }
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/// getFlags - Return the raw flags of the source value, \see MemOperandFlags.
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unsigned int getFlags() const { return Flags & ((1 << MOMaxBits) - 1); }
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/// Bitwise OR the current flags with the given flags.
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void setFlags(unsigned f) { Flags |= (f & ((1 << MOMaxBits) - 1)); }
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/// getOffset - For normal values, this is a byte offset added to the base
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/// address. For PseudoSourceValue::FPRel values, this is the FrameIndex
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/// number.
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int64_t getOffset() const { return PtrInfo.Offset; }
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/// getSize - Return the size in bytes of the memory reference.
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uint64_t getSize() const { return Size; }
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/// getAlignment - Return the minimum known alignment in bytes of the
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/// actual memory reference.
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uint64_t getAlignment() const;
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/// getBaseAlignment - Return the minimum known alignment in bytes of the
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/// base address, without the offset.
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uint64_t getBaseAlignment() const { return (1u << (Flags >> MOMaxBits)) >> 1; }
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/// getTBAAInfo - Return the TBAA tag for the memory reference.
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const MDNode *getTBAAInfo() const { return TBAAInfo; }
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/// getRanges - Return the range tag for the memory reference.
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const MDNode *getRanges() const { return Ranges; }
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bool isLoad() const { return Flags & MOLoad; }
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bool isStore() const { return Flags & MOStore; }
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bool isVolatile() const { return Flags & MOVolatile; }
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bool isNonTemporal() const { return Flags & MONonTemporal; }
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bool isInvariant() const { return Flags & MOInvariant; }
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/// isUnordered - Returns true if this memory operation doesn't have any
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/// ordering constraints other than normal aliasing. Volatile and atomic
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/// memory operations can't be reordered.
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///
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/// Currently, we don't model the difference between volatile and atomic
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/// operations. They should retain their ordering relative to all memory
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/// operations.
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bool isUnordered() const { return !isVolatile(); }
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/// refineAlignment - Update this MachineMemOperand to reflect the alignment
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/// of MMO, if it has a greater alignment. This must only be used when the
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/// new alignment applies to all users of this MachineMemOperand.
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void refineAlignment(const MachineMemOperand *MMO);
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/// setValue - Change the SourceValue for this MachineMemOperand. This
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/// should only be used when an object is being relocated and all references
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/// to it are being updated.
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void setValue(const Value *NewSV) { PtrInfo.V = NewSV; }
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void setOffset(int64_t NewOffset) { PtrInfo.Offset = NewOffset; }
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/// Profile - Gather unique data for the object.
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///
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void Profile(FoldingSetNodeID &ID) const;
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};
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raw_ostream &operator<<(raw_ostream &OS, const MachineMemOperand &MRO);
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} // End llvm namespace
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#endif
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