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https://github.com/c64scene-ar/llvm-6502.git
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This fixes a couple of bugs and incorrect assumptions, in total four more piglit tests now pass. v2: fix small bug in the dominator updating Patch by: Christian König Signed-off-by: Christian König <christian.koenig@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174762 91177308-0d34-0410-b5e6-96231b3b80d8
819 lines
23 KiB
C++
819 lines
23 KiB
C++
//===-- AMDGPUStructurizeCFG.cpp - ------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// The pass implemented in this file transforms the programs control flow
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/// graph into a form that's suitable for code generation on hardware that
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/// implements control flow by execution masking. This currently includes all
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/// AMD GPUs but may as well be useful for other types of hardware.
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPU.h"
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#include "llvm/ADT/SCCIterator.h"
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#include "llvm/Analysis/RegionInfo.h"
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#include "llvm/Analysis/RegionIterator.h"
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#include "llvm/Analysis/RegionPass.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Transforms/Utils/SSAUpdater.h"
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using namespace llvm;
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namespace {
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// Definition of the complex types used in this pass.
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typedef std::pair<BasicBlock *, Value *> BBValuePair;
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typedef SmallVector<RegionNode*, 8> RNVector;
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typedef SmallVector<BasicBlock*, 8> BBVector;
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typedef SmallVector<BranchInst*, 8> BranchVector;
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typedef SmallVector<BBValuePair, 2> BBValueVector;
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typedef SmallPtrSet<BasicBlock *, 8> BBSet;
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typedef DenseMap<PHINode *, BBValueVector> PhiMap;
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typedef DenseMap<BasicBlock *, PhiMap> BBPhiMap;
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typedef DenseMap<BasicBlock *, Value *> BBPredicates;
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typedef DenseMap<BasicBlock *, BBPredicates> PredMap;
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typedef DenseMap<BasicBlock *, BBVector> BB2BBVecMap;
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// The name for newly created blocks.
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static const char *FlowBlockName = "Flow";
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/// @brief Transforms the control flow graph on one single entry/exit region
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/// at a time.
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///
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/// After the transform all "If"/"Then"/"Else" style control flow looks like
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/// this:
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///
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/// \verbatim
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/// 1
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/// ||
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/// | |
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/// 2 |
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/// | /
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/// |/
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/// 3
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/// || Where:
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/// | | 1 = "If" block, calculates the condition
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/// 4 | 2 = "Then" subregion, runs if the condition is true
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/// | / 3 = "Flow" blocks, newly inserted flow blocks, rejoins the flow
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/// |/ 4 = "Else" optional subregion, runs if the condition is false
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/// 5 5 = "End" block, also rejoins the control flow
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/// \endverbatim
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///
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/// Control flow is expressed as a branch where the true exit goes into the
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/// "Then"/"Else" region, while the false exit skips the region
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/// The condition for the optional "Else" region is expressed as a PHI node.
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/// The incomming values of the PHI node are true for the "If" edge and false
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/// for the "Then" edge.
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///
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/// Additionally to that even complicated loops look like this:
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///
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/// \verbatim
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/// 1
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/// ||
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/// | |
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/// 2 ^ Where:
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/// | / 1 = "Entry" block
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/// |/ 2 = "Loop" optional subregion, with all exits at "Flow" block
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/// 3 3 = "Flow" block, with back edge to entry block
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/// |
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/// \endverbatim
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///
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/// The back edge of the "Flow" block is always on the false side of the branch
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/// while the true side continues the general flow. So the loop condition
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/// consist of a network of PHI nodes where the true incoming values expresses
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/// breaks and the false values expresses continue states.
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class AMDGPUStructurizeCFG : public RegionPass {
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static char ID;
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Type *Boolean;
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ConstantInt *BoolTrue;
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ConstantInt *BoolFalse;
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UndefValue *BoolUndef;
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Function *Func;
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Region *ParentRegion;
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DominatorTree *DT;
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RNVector Order;
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BBSet Visited;
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PredMap Predicates;
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BBPhiMap DeletedPhis;
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BB2BBVecMap AddedPhis;
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BranchVector Conditions;
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BasicBlock *LoopStart;
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BasicBlock *LoopEnd;
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BBSet LoopTargets;
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BBPredicates LoopPred;
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void orderNodes();
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Value *buildCondition(BranchInst *Term, unsigned Idx, bool Invert);
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bool analyzeLoopStart(BasicBlock *From, BasicBlock *To, Value *Condition);
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void analyzeNode(RegionNode *N);
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void analyzeLoopEnd(RegionNode *N);
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void collectInfos();
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void insertConditions();
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void delPhiValues(BasicBlock *From, BasicBlock *To);
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void addPhiValues(BasicBlock *From, BasicBlock *To);
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void setPhiValues();
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void killTerminator(BasicBlock *BB);
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void changeExit(RegionNode *Node, BasicBlock *NewExit,
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bool IncludeDominator);
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BasicBlock *getNextFlow(BasicBlock *Dominator);
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BasicBlock *needPrefix(RegionNode *&Prev, RegionNode *Node);
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BasicBlock *needPostfix(BasicBlock *Flow, bool ExitUseAllowed);
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RegionNode *getNextPrev(BasicBlock *Next);
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bool dominatesPredicates(BasicBlock *BB, RegionNode *Node);
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bool isPredictableTrue(RegionNode *Who, RegionNode *Where);
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RegionNode *wireFlow(RegionNode *&Prev, bool ExitUseAllowed);
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void createFlow();
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void rebuildSSA();
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public:
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AMDGPUStructurizeCFG():
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RegionPass(ID) {
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initializeRegionInfoPass(*PassRegistry::getPassRegistry());
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}
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virtual bool doInitialization(Region *R, RGPassManager &RGM);
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virtual bool runOnRegion(Region *R, RGPassManager &RGM);
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virtual const char *getPassName() const {
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return "AMDGPU simplify control flow";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<DominatorTree>();
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AU.addPreserved<DominatorTree>();
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RegionPass::getAnalysisUsage(AU);
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}
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};
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} // end anonymous namespace
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char AMDGPUStructurizeCFG::ID = 0;
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/// \brief Initialize the types and constants used in the pass
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bool AMDGPUStructurizeCFG::doInitialization(Region *R, RGPassManager &RGM) {
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LLVMContext &Context = R->getEntry()->getContext();
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Boolean = Type::getInt1Ty(Context);
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BoolTrue = ConstantInt::getTrue(Context);
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BoolFalse = ConstantInt::getFalse(Context);
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BoolUndef = UndefValue::get(Boolean);
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return false;
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}
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/// \brief Build up the general order of nodes
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void AMDGPUStructurizeCFG::orderNodes() {
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scc_iterator<Region *> I = scc_begin(ParentRegion),
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E = scc_end(ParentRegion);
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for (Order.clear(); I != E; ++I) {
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std::vector<RegionNode *> &Nodes = *I;
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Order.append(Nodes.begin(), Nodes.end());
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}
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}
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/// \brief Build the condition for one edge
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Value *AMDGPUStructurizeCFG::buildCondition(BranchInst *Term, unsigned Idx,
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bool Invert) {
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Value *Cond = Invert ? BoolFalse : BoolTrue;
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if (Term->isConditional()) {
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Cond = Term->getCondition();
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if (Idx != Invert)
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Cond = BinaryOperator::CreateNot(Cond, "", Term);
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}
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return Cond;
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}
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/// \brief Analyze the start of a loop and insert predicates as necessary
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bool AMDGPUStructurizeCFG::analyzeLoopStart(BasicBlock *From, BasicBlock *To,
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Value *Condition) {
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LoopPred[From] = Condition;
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LoopTargets.insert(To);
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if (!LoopStart) {
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LoopStart = To;
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return true;
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} else if (LoopStart == To)
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return true;
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// We need to handle the case of intersecting loops, e. g.
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//
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// /----<-----
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// | |
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// -> A -> B -> C -> D
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// | |
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// -----<----/
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RNVector::reverse_iterator OI = Order.rbegin(), OE = Order.rend();
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for (;OI != OE; ++OI)
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if ((*OI)->getEntry() == LoopStart)
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break;
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for (;OI != OE && (*OI)->getEntry() != To; ++OI) {
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BBPredicates &Pred = Predicates[(*OI)->getEntry()];
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if (!Pred.count(From))
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Pred[From] = Condition;
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}
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return false;
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}
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/// \brief Analyze the predecessors of each block and build up predicates
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void AMDGPUStructurizeCFG::analyzeNode(RegionNode *N) {
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RegionInfo *RI = ParentRegion->getRegionInfo();
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BasicBlock *BB = N->getEntry();
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BBPredicates &Pred = Predicates[BB];
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for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB);
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PI != PE; ++PI) {
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if (!ParentRegion->contains(*PI)) {
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// It's a branch from outside into our region entry
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Pred[*PI] = BoolTrue;
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continue;
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}
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Region *R = RI->getRegionFor(*PI);
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if (R == ParentRegion) {
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// It's a top level block in our region
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BranchInst *Term = cast<BranchInst>((*PI)->getTerminator());
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for (unsigned i = 0, e = Term->getNumSuccessors(); i != e; ++i) {
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BasicBlock *Succ = Term->getSuccessor(i);
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if (Succ != BB)
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continue;
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if (Visited.count(*PI)) {
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// Normal forward edge
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if (Term->isConditional()) {
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// Try to treat it like an ELSE block
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BasicBlock *Other = Term->getSuccessor(!i);
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if (Visited.count(Other) && !LoopTargets.count(Other) &&
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!Pred.count(Other) && !Pred.count(*PI)) {
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Pred[Other] = BoolFalse;
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Pred[*PI] = BoolTrue;
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continue;
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}
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}
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} else {
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// Back edge
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if (analyzeLoopStart(*PI, BB, buildCondition(Term, i, true)))
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continue;
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}
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Pred[*PI] = buildCondition(Term, i, false);
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}
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} else {
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// It's an exit from a sub region
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while(R->getParent() != ParentRegion)
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R = R->getParent();
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// Edge from inside a subregion to its entry, ignore it
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if (R == N)
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continue;
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BasicBlock *Entry = R->getEntry();
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if (!Visited.count(Entry))
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if (analyzeLoopStart(Entry, BB, BoolFalse))
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continue;
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Pred[Entry] = BoolTrue;
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}
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}
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}
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/// \brief Determine the end of the loop
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void AMDGPUStructurizeCFG::analyzeLoopEnd(RegionNode *N) {
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if (N->isSubRegion()) {
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// Test for exit as back edge
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BasicBlock *Exit = N->getNodeAs<Region>()->getExit();
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if (Visited.count(Exit))
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LoopEnd = N->getEntry();
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} else {
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// Test for sucessors as back edge
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BasicBlock *BB = N->getNodeAs<BasicBlock>();
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BranchInst *Term = cast<BranchInst>(BB->getTerminator());
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for (unsigned i = 0, e = Term->getNumSuccessors(); i != e; ++i) {
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BasicBlock *Succ = Term->getSuccessor(i);
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if (Visited.count(Succ))
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LoopEnd = BB;
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}
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}
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}
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/// \brief Collect various loop and predicate infos
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void AMDGPUStructurizeCFG::collectInfos() {
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// Reset predicate
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Predicates.clear();
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// and loop infos
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LoopStart = LoopEnd = 0;
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LoopTargets.clear();
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LoopPred.clear();
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// Reset the visited nodes
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Visited.clear();
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for (RNVector::reverse_iterator OI = Order.rbegin(), OE = Order.rend();
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OI != OE; ++OI) {
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// Analyze all the conditions leading to a node
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analyzeNode(*OI);
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// Remember that we've seen this node
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Visited.insert((*OI)->getEntry());
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// Find the last back edge
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analyzeLoopEnd(*OI);
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}
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// Both or neither must be set
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assert(!LoopStart == !LoopEnd);
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}
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/// \brief Insert the missing branch conditions
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void AMDGPUStructurizeCFG::insertConditions() {
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SSAUpdater PhiInserter;
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for (BranchVector::iterator I = Conditions.begin(),
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E = Conditions.end(); I != E; ++I) {
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BranchInst *Term = *I;
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BasicBlock *Parent = Term->getParent();
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assert(Term->isConditional());
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PhiInserter.Initialize(Boolean, "");
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if (Parent == LoopEnd) {
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PhiInserter.AddAvailableValue(LoopStart, BoolTrue);
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} else {
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PhiInserter.AddAvailableValue(&Func->getEntryBlock(), BoolFalse);
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PhiInserter.AddAvailableValue(Parent, BoolFalse);
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}
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bool ParentHasValue = false;
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BasicBlock *Succ = Term->getSuccessor(0);
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BBPredicates &Preds = (Parent == LoopEnd) ? LoopPred : Predicates[Succ];
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for (BBPredicates::iterator PI = Preds.begin(), PE = Preds.end();
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PI != PE; ++PI) {
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PhiInserter.AddAvailableValue(PI->first, PI->second);
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ParentHasValue |= PI->first == Parent;
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}
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if (ParentHasValue)
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Term->setCondition(PhiInserter.GetValueAtEndOfBlock(Parent));
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else
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Term->setCondition(PhiInserter.GetValueInMiddleOfBlock(Parent));
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}
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}
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/// \brief Remove all PHI values coming from "From" into "To" and remember
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/// them in DeletedPhis
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void AMDGPUStructurizeCFG::delPhiValues(BasicBlock *From, BasicBlock *To) {
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PhiMap &Map = DeletedPhis[To];
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for (BasicBlock::iterator I = To->begin(), E = To->end();
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I != E && isa<PHINode>(*I);) {
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PHINode &Phi = cast<PHINode>(*I++);
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while (Phi.getBasicBlockIndex(From) != -1) {
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Value *Deleted = Phi.removeIncomingValue(From, false);
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Map[&Phi].push_back(std::make_pair(From, Deleted));
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}
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}
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}
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/// \brief Add a dummy PHI value as soon as we knew the new predecessor
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void AMDGPUStructurizeCFG::addPhiValues(BasicBlock *From, BasicBlock *To) {
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for (BasicBlock::iterator I = To->begin(), E = To->end();
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I != E && isa<PHINode>(*I);) {
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PHINode &Phi = cast<PHINode>(*I++);
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Value *Undef = UndefValue::get(Phi.getType());
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Phi.addIncoming(Undef, From);
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}
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AddedPhis[To].push_back(From);
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}
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/// \brief Add the real PHI value as soon as everything is set up
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void AMDGPUStructurizeCFG::setPhiValues() {
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SSAUpdater Updater;
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for (BB2BBVecMap::iterator AI = AddedPhis.begin(), AE = AddedPhis.end();
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AI != AE; ++AI) {
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BasicBlock *To = AI->first;
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BBVector &From = AI->second;
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if (!DeletedPhis.count(To))
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continue;
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PhiMap &Map = DeletedPhis[To];
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for (PhiMap::iterator PI = Map.begin(), PE = Map.end();
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PI != PE; ++PI) {
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PHINode *Phi = PI->first;
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Value *Undef = UndefValue::get(Phi->getType());
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Updater.Initialize(Phi->getType(), "");
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Updater.AddAvailableValue(&Func->getEntryBlock(), Undef);
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Updater.AddAvailableValue(To, Undef);
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for (BBValueVector::iterator VI = PI->second.begin(),
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VE = PI->second.end(); VI != VE; ++VI) {
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Updater.AddAvailableValue(VI->first, VI->second);
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}
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for (BBVector::iterator FI = From.begin(), FE = From.end();
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FI != FE; ++FI) {
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int Idx = Phi->getBasicBlockIndex(*FI);
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assert(Idx != -1);
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Phi->setIncomingValue(Idx, Updater.GetValueAtEndOfBlock(*FI));
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}
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}
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DeletedPhis.erase(To);
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}
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assert(DeletedPhis.empty());
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}
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/// \brief Remove phi values from all successors and then remove the terminator.
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void AMDGPUStructurizeCFG::killTerminator(BasicBlock *BB) {
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TerminatorInst *Term = BB->getTerminator();
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if (!Term)
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return;
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for (succ_iterator SI = succ_begin(BB), SE = succ_end(BB);
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SI != SE; ++SI) {
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delPhiValues(BB, *SI);
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}
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Term->eraseFromParent();
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}
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/// \brief Let node exit(s) point to NewExit
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void AMDGPUStructurizeCFG::changeExit(RegionNode *Node, BasicBlock *NewExit,
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bool IncludeDominator) {
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if (Node->isSubRegion()) {
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Region *SubRegion = Node->getNodeAs<Region>();
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BasicBlock *OldExit = SubRegion->getExit();
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BasicBlock *Dominator = 0;
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// Find all the edges from the sub region to the exit
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for (pred_iterator I = pred_begin(OldExit), E = pred_end(OldExit);
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I != E;) {
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BasicBlock *BB = *I++;
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if (!SubRegion->contains(BB))
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continue;
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// Modify the edges to point to the new exit
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delPhiValues(BB, OldExit);
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BB->getTerminator()->replaceUsesOfWith(OldExit, NewExit);
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addPhiValues(BB, NewExit);
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// Find the new dominator (if requested)
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if (IncludeDominator) {
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if (!Dominator)
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Dominator = BB;
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else
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Dominator = DT->findNearestCommonDominator(Dominator, BB);
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}
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}
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// Change the dominator (if requested)
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if (Dominator)
|
|
DT->changeImmediateDominator(NewExit, Dominator);
|
|
|
|
// Update the region info
|
|
SubRegion->replaceExit(NewExit);
|
|
|
|
} else {
|
|
BasicBlock *BB = Node->getNodeAs<BasicBlock>();
|
|
killTerminator(BB);
|
|
BranchInst::Create(NewExit, BB);
|
|
addPhiValues(BB, NewExit);
|
|
if (IncludeDominator)
|
|
DT->changeImmediateDominator(NewExit, BB);
|
|
}
|
|
}
|
|
|
|
/// \brief Create a new flow node and update dominator tree and region info
|
|
BasicBlock *AMDGPUStructurizeCFG::getNextFlow(BasicBlock *Dominator) {
|
|
LLVMContext &Context = Func->getContext();
|
|
BasicBlock *Insert = Order.empty() ? ParentRegion->getExit() :
|
|
Order.back()->getEntry();
|
|
BasicBlock *Flow = BasicBlock::Create(Context, FlowBlockName,
|
|
Func, Insert);
|
|
DT->addNewBlock(Flow, Dominator);
|
|
ParentRegion->getRegionInfo()->setRegionFor(Flow, ParentRegion);
|
|
return Flow;
|
|
}
|
|
|
|
/// \brief Create a new or reuse the previous node as flow node
|
|
BasicBlock *AMDGPUStructurizeCFG::needPrefix(RegionNode *&Prev,
|
|
RegionNode *Node) {
|
|
|
|
if (!Prev || Prev->isSubRegion() ||
|
|
(Node && Node->getEntry() == LoopStart)) {
|
|
|
|
// We need to insert a flow node, first figure out the dominator
|
|
DomTreeNode *Dominator = Prev ? DT->getNode(Prev->getEntry()) : 0;
|
|
if (!Dominator)
|
|
Dominator = DT->getNode(Node->getEntry())->getIDom();
|
|
assert(Dominator && "Illegal loop to function entry");
|
|
|
|
// then create the flow node
|
|
BasicBlock *Flow = getNextFlow(Dominator->getBlock());
|
|
|
|
// wire up the new flow
|
|
if (Prev) {
|
|
changeExit(Prev, Flow, true);
|
|
} else {
|
|
// Parent regions entry needs predicates, create a new region entry
|
|
BasicBlock *Entry = Node->getEntry();
|
|
for (pred_iterator I = pred_begin(Entry), E = pred_end(Entry);
|
|
I != E;) {
|
|
|
|
BasicBlock *BB = *(I++);
|
|
if (ParentRegion->contains(BB))
|
|
continue;
|
|
|
|
// Remove PHY values from outside to our entry node
|
|
delPhiValues(BB, Entry);
|
|
|
|
// Update the branch instructions
|
|
BB->getTerminator()->replaceUsesOfWith(Entry, Flow);
|
|
}
|
|
|
|
// Populate the region tree with the new entry
|
|
for (Region *R = ParentRegion; R && R->getEntry() == Entry;
|
|
R = R->getParent()) {
|
|
R->replaceEntry(Flow);
|
|
}
|
|
}
|
|
Prev = ParentRegion->getBBNode(Flow);
|
|
|
|
} else {
|
|
killTerminator(Prev->getEntry());
|
|
}
|
|
|
|
return Prev->getEntry();
|
|
}
|
|
|
|
/// \brief Returns the region exit if possible, otherwise just a new flow node
|
|
BasicBlock *AMDGPUStructurizeCFG::needPostfix(BasicBlock *Flow,
|
|
bool ExitUseAllowed) {
|
|
|
|
if (Order.empty() && ExitUseAllowed) {
|
|
BasicBlock *Exit = ParentRegion->getExit();
|
|
DT->changeImmediateDominator(Exit, Flow);
|
|
addPhiValues(Flow, Exit);
|
|
return Exit;
|
|
}
|
|
return getNextFlow(Flow);
|
|
}
|
|
|
|
/// \brief Returns the region node for Netx, or null if Next is the exit
|
|
RegionNode *AMDGPUStructurizeCFG::getNextPrev(BasicBlock *Next) {
|
|
return ParentRegion->contains(Next) ? ParentRegion->getBBNode(Next) : 0;
|
|
}
|
|
|
|
/// \brief Does BB dominate all the predicates of Node ?
|
|
bool AMDGPUStructurizeCFG::dominatesPredicates(BasicBlock *BB, RegionNode *Node) {
|
|
BBPredicates &Preds = Predicates[Node->getEntry()];
|
|
for (BBPredicates::iterator PI = Preds.begin(), PE = Preds.end();
|
|
PI != PE; ++PI) {
|
|
|
|
if (!DT->dominates(BB, PI->first))
|
|
return false;
|
|
}
|
|
return true;
|
|
}
|
|
|
|
/// \brief Can we predict that this node will always be called?
|
|
bool AMDGPUStructurizeCFG::isPredictableTrue(RegionNode *Who,
|
|
RegionNode *Where) {
|
|
|
|
BBPredicates &Preds = Predicates[Who->getEntry()];
|
|
bool Dominated = Where == 0;
|
|
|
|
for (BBPredicates::iterator I = Preds.begin(), E = Preds.end();
|
|
I != E; ++I) {
|
|
|
|
if (I->second != BoolTrue)
|
|
return false;
|
|
|
|
if (!Dominated && DT->dominates(I->first, Where->getEntry()))
|
|
Dominated = true;
|
|
}
|
|
|
|
// TODO: The dominator check is too strict
|
|
return Dominated;
|
|
}
|
|
|
|
/// Take one node from the order vector and wire it up
|
|
RegionNode *AMDGPUStructurizeCFG::wireFlow(RegionNode *&Prev,
|
|
bool ExitUseAllowed) {
|
|
|
|
RegionNode *Node = Order.pop_back_val();
|
|
|
|
if (isPredictableTrue(Node, Prev)) {
|
|
// Just a linear flow
|
|
if (Prev) {
|
|
changeExit(Prev, Node->getEntry(), true);
|
|
}
|
|
Prev = Node;
|
|
|
|
} else {
|
|
// Insert extra prefix node (or reuse last one)
|
|
BasicBlock *Flow = needPrefix(Prev, Node);
|
|
if (Node->getEntry() == LoopStart)
|
|
LoopStart = Flow;
|
|
|
|
// Insert extra postfix node (or use exit instead)
|
|
BasicBlock *Entry = Node->getEntry();
|
|
BasicBlock *Next = needPostfix(Flow, ExitUseAllowed && Entry != LoopEnd);
|
|
|
|
// let it point to entry and next block
|
|
Conditions.push_back(BranchInst::Create(Entry, Next, BoolUndef, Flow));
|
|
addPhiValues(Flow, Entry);
|
|
DT->changeImmediateDominator(Entry, Flow);
|
|
|
|
Prev = Node;
|
|
while (!Order.empty() && Node->getEntry() != LoopEnd &&
|
|
!LoopTargets.count(Order.back()->getEntry()) &&
|
|
dominatesPredicates(Entry, Order.back())) {
|
|
Node = wireFlow(Prev, false);
|
|
}
|
|
|
|
changeExit(Prev, Next, false);
|
|
Prev = getNextPrev(Next);
|
|
}
|
|
|
|
return Node;
|
|
}
|
|
|
|
/// After this function control flow looks like it should be, but
|
|
/// branches and PHI nodes only have undefined conditions.
|
|
void AMDGPUStructurizeCFG::createFlow() {
|
|
|
|
BasicBlock *Exit = ParentRegion->getExit();
|
|
bool EntryDominatesExit = DT->dominates(ParentRegion->getEntry(), Exit);
|
|
|
|
DeletedPhis.clear();
|
|
AddedPhis.clear();
|
|
Conditions.clear();
|
|
|
|
RegionNode *Prev = 0;
|
|
while (!Order.empty()) {
|
|
|
|
RegionNode *Node = wireFlow(Prev, EntryDominatesExit);
|
|
|
|
// Create an extra loop end node
|
|
if (Node->getEntry() == LoopEnd) {
|
|
LoopEnd = needPrefix(Prev, 0);
|
|
BasicBlock *Next = needPostfix(LoopEnd, EntryDominatesExit);
|
|
|
|
Conditions.push_back(BranchInst::Create(Next, LoopStart,
|
|
BoolUndef, LoopEnd));
|
|
addPhiValues(LoopEnd, LoopStart);
|
|
Prev = getNextPrev(Next);
|
|
}
|
|
}
|
|
|
|
if (Prev)
|
|
changeExit(Prev, Exit, EntryDominatesExit);
|
|
else
|
|
assert(EntryDominatesExit);
|
|
}
|
|
|
|
/// Handle a rare case where the disintegrated nodes instructions
|
|
/// no longer dominate all their uses. Not sure if this is really nessasary
|
|
void AMDGPUStructurizeCFG::rebuildSSA() {
|
|
SSAUpdater Updater;
|
|
for (Region::block_iterator I = ParentRegion->block_begin(),
|
|
E = ParentRegion->block_end();
|
|
I != E; ++I) {
|
|
|
|
BasicBlock *BB = *I;
|
|
for (BasicBlock::iterator II = BB->begin(), IE = BB->end();
|
|
II != IE; ++II) {
|
|
|
|
bool Initialized = false;
|
|
for (Use *I = &II->use_begin().getUse(), *Next; I; I = Next) {
|
|
|
|
Next = I->getNext();
|
|
|
|
Instruction *User = cast<Instruction>(I->getUser());
|
|
if (User->getParent() == BB) {
|
|
continue;
|
|
|
|
} else if (PHINode *UserPN = dyn_cast<PHINode>(User)) {
|
|
if (UserPN->getIncomingBlock(*I) == BB)
|
|
continue;
|
|
}
|
|
|
|
if (DT->dominates(II, User))
|
|
continue;
|
|
|
|
if (!Initialized) {
|
|
Value *Undef = UndefValue::get(II->getType());
|
|
Updater.Initialize(II->getType(), "");
|
|
Updater.AddAvailableValue(&Func->getEntryBlock(), Undef);
|
|
Updater.AddAvailableValue(BB, II);
|
|
Initialized = true;
|
|
}
|
|
Updater.RewriteUseAfterInsertions(*I);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/// \brief Run the transformation for each region found
|
|
bool AMDGPUStructurizeCFG::runOnRegion(Region *R, RGPassManager &RGM) {
|
|
if (R->isTopLevelRegion())
|
|
return false;
|
|
|
|
Func = R->getEntry()->getParent();
|
|
ParentRegion = R;
|
|
|
|
DT = &getAnalysis<DominatorTree>();
|
|
|
|
orderNodes();
|
|
collectInfos();
|
|
createFlow();
|
|
insertConditions();
|
|
setPhiValues();
|
|
rebuildSSA();
|
|
|
|
// Cleanup
|
|
Order.clear();
|
|
Visited.clear();
|
|
Predicates.clear();
|
|
DeletedPhis.clear();
|
|
AddedPhis.clear();
|
|
Conditions.clear();
|
|
LoopTargets.clear();
|
|
LoopPred.clear();
|
|
|
|
return true;
|
|
}
|
|
|
|
/// \brief Create the pass
|
|
Pass *llvm::createAMDGPUStructurizeCFGPass() {
|
|
return new AMDGPUStructurizeCFG();
|
|
}
|