mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-06 09:54:49 +00:00
014278e6a1
isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56189 91177308-0d34-0410-b5e6-96231b3b80d8
449 lines
15 KiB
C++
449 lines
15 KiB
C++
//===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declaration of the MachineOperand class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MACHINEOPERAND_H
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#define LLVM_CODEGEN_MACHINEOPERAND_H
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#include "llvm/Support/DataTypes.h"
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#include <cassert>
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#include <iosfwd>
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namespace llvm {
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class ConstantFP;
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class MachineBasicBlock;
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class GlobalValue;
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class MachineInstr;
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class TargetMachine;
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class MachineRegisterInfo;
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class raw_ostream;
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/// MachineOperand class - Representation of each machine instruction operand.
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///
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class MachineOperand {
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public:
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enum MachineOperandType {
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MO_Register, // Register operand.
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MO_Immediate, // Immediate Operand
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MO_FPImmediate,
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MO_MachineBasicBlock, // MachineBasicBlock reference
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MO_FrameIndex, // Abstract Stack Frame Index
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MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
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MO_JumpTableIndex, // Address of indexed Jump Table for switch
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MO_ExternalSymbol, // Name of external global symbol
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MO_GlobalAddress // Address of a global value
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};
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private:
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/// OpKind - Specify what kind of operand this is. This discriminates the
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/// union.
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MachineOperandType OpKind : 8;
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/// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
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/// operands.
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/// IsDef - True if this is a def, false if this is a use of the register.
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///
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bool IsDef : 1;
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/// IsImp - True if this is an implicit def or use, false if it is explicit.
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///
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bool IsImp : 1;
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/// IsKill - True if this instruction is the last use of the register on this
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/// path through the function. This is only valid on uses of registers.
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bool IsKill : 1;
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/// IsDead - True if this register is never used by a subsequent instruction.
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/// This is only valid on definitions of registers.
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bool IsDead : 1;
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/// IsEarlyClobber flag - this is only valid for MO_Register operands in
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/// an inline asm.
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/// IsEarlyClobber - True if this operand is marked earlyclobber in an
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/// inline asm. See gcc doc for description of earlyclobber.
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bool IsEarlyClobber : 1;
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/// SubReg - Subregister number, only valid for MO_Register. A value of 0
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/// indicates the MO_Register has no subReg.
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unsigned char SubReg;
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/// ParentMI - This is the instruction that this operand is embedded into.
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/// This is valid for all operand types, when the operand is in an instr.
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MachineInstr *ParentMI;
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/// Contents union - This contains the payload for the various operand types.
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union {
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MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
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const ConstantFP *CFP; // For MO_FPImmediate.
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int64_t ImmVal; // For MO_Immediate.
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struct { // For MO_Register.
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unsigned RegNo;
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MachineOperand **Prev; // Access list for register.
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MachineOperand *Next;
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} Reg;
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/// OffsetedInfo - This struct contains the offset and an object identifier.
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/// this represent the object as with an optional offset from it.
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struct {
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union {
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int Index; // For MO_*Index - The index itself.
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const char *SymbolName; // For MO_ExternalSymbol.
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GlobalValue *GV; // For MO_GlobalAddress.
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} Val;
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int Offset; // An offset from the object.
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} OffsetedInfo;
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} Contents;
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explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {}
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public:
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MachineOperand(const MachineOperand &M) {
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*this = M;
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}
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~MachineOperand() {}
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/// getType - Returns the MachineOperandType for this operand.
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///
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MachineOperandType getType() const { return OpKind; }
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/// getParent - Return the instruction that this operand belongs to.
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///
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MachineInstr *getParent() { return ParentMI; }
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const MachineInstr *getParent() const { return ParentMI; }
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void print(std::ostream &os, const TargetMachine *TM = 0) const;
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void print(raw_ostream &os, const TargetMachine *TM = 0) const;
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/// Accessors that tell you what kind of MachineOperand you're looking at.
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///
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bool isRegister() const { return OpKind == MO_Register; }
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bool isImmediate() const { return OpKind == MO_Immediate; }
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bool isFPImmediate() const { return OpKind == MO_FPImmediate; }
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bool isMachineBasicBlock() const { return OpKind == MO_MachineBasicBlock; }
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bool isFrameIndex() const { return OpKind == MO_FrameIndex; }
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bool isConstantPoolIndex() const { return OpKind == MO_ConstantPoolIndex; }
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bool isJumpTableIndex() const { return OpKind == MO_JumpTableIndex; }
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bool isGlobalAddress() const { return OpKind == MO_GlobalAddress; }
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bool isExternalSymbol() const { return OpKind == MO_ExternalSymbol; }
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//===--------------------------------------------------------------------===//
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// Accessors for Register Operands
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//===--------------------------------------------------------------------===//
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/// getReg - Returns the register number.
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unsigned getReg() const {
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assert(isRegister() && "This is not a register operand!");
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return Contents.Reg.RegNo;
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}
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unsigned getSubReg() const {
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assert(isRegister() && "Wrong MachineOperand accessor");
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return (unsigned)SubReg;
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}
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bool isUse() const {
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assert(isRegister() && "Wrong MachineOperand accessor");
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return !IsDef;
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}
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bool isDef() const {
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assert(isRegister() && "Wrong MachineOperand accessor");
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return IsDef;
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}
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bool isImplicit() const {
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assert(isRegister() && "Wrong MachineOperand accessor");
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return IsImp;
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}
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bool isDead() const {
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assert(isRegister() && "Wrong MachineOperand accessor");
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return IsDead;
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}
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bool isKill() const {
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assert(isRegister() && "Wrong MachineOperand accessor");
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return IsKill;
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}
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bool isEarlyClobber() const {
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assert(isRegister() && "Wrong MachineOperand accessor");
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return IsEarlyClobber;
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}
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/// getNextOperandForReg - Return the next MachineOperand in the function that
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/// uses or defines this register.
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MachineOperand *getNextOperandForReg() const {
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assert(isRegister() && "This is not a register operand!");
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return Contents.Reg.Next;
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}
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//===--------------------------------------------------------------------===//
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// Mutators for Register Operands
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//===--------------------------------------------------------------------===//
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/// Change the register this operand corresponds to.
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///
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void setReg(unsigned Reg);
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void setSubReg(unsigned subReg) {
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assert(isRegister() && "Wrong MachineOperand accessor");
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SubReg = (unsigned char)subReg;
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}
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void setIsUse(bool Val = true) {
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assert(isRegister() && "Wrong MachineOperand accessor");
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IsDef = !Val;
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}
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void setIsDef(bool Val = true) {
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assert(isRegister() && "Wrong MachineOperand accessor");
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IsDef = Val;
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}
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void setImplicit(bool Val = true) {
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assert(isRegister() && "Wrong MachineOperand accessor");
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IsImp = Val;
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}
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void setIsKill(bool Val = true) {
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assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
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IsKill = Val;
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}
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void setIsDead(bool Val = true) {
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assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
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IsDead = Val;
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}
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void setIsEarlyClobber(bool Val = true) {
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assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
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IsEarlyClobber = Val;
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}
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//===--------------------------------------------------------------------===//
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// Accessors for various operand types.
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//===--------------------------------------------------------------------===//
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int64_t getImm() const {
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assert(isImmediate() && "Wrong MachineOperand accessor");
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return Contents.ImmVal;
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}
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const ConstantFP *getFPImm() const {
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assert(isFPImmediate() && "Wrong MachineOperand accessor");
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return Contents.CFP;
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}
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MachineBasicBlock *getMBB() const {
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assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
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return Contents.MBB;
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}
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int getIndex() const {
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assert((isFrameIndex() || isConstantPoolIndex() || isJumpTableIndex()) &&
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"Wrong MachineOperand accessor");
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return Contents.OffsetedInfo.Val.Index;
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}
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GlobalValue *getGlobal() const {
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assert(isGlobalAddress() && "Wrong MachineOperand accessor");
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return Contents.OffsetedInfo.Val.GV;
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}
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int getOffset() const {
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assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
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"Wrong MachineOperand accessor");
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return Contents.OffsetedInfo.Offset;
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}
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const char *getSymbolName() const {
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assert(isExternalSymbol() && "Wrong MachineOperand accessor");
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return Contents.OffsetedInfo.Val.SymbolName;
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}
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//===--------------------------------------------------------------------===//
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// Mutators for various operand types.
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//===--------------------------------------------------------------------===//
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void setImm(int64_t immVal) {
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assert(isImmediate() && "Wrong MachineOperand mutator");
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Contents.ImmVal = immVal;
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}
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void setOffset(int Offset) {
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assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
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"Wrong MachineOperand accessor");
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Contents.OffsetedInfo.Offset = Offset;
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}
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void setIndex(int Idx) {
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assert((isFrameIndex() || isConstantPoolIndex() || isJumpTableIndex()) &&
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"Wrong MachineOperand accessor");
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Contents.OffsetedInfo.Val.Index = Idx;
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}
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void setMBB(MachineBasicBlock *MBB) {
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assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
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Contents.MBB = MBB;
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}
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//===--------------------------------------------------------------------===//
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// Other methods.
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//===--------------------------------------------------------------------===//
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/// isIdenticalTo - Return true if this operand is identical to the specified
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/// operand. Note: This method ignores isKill and isDead properties.
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bool isIdenticalTo(const MachineOperand &Other) const;
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/// ChangeToImmediate - Replace this operand with a new immediate operand of
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/// the specified value. If an operand is known to be an immediate already,
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/// the setImm method should be used.
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void ChangeToImmediate(int64_t ImmVal);
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/// ChangeToRegister - Replace this operand with a new register operand of
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/// the specified value. If an operand is known to be an register already,
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/// the setReg method should be used.
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void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
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bool isKill = false, bool isDead = false,
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bool isEarlyClobber = false);
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//===--------------------------------------------------------------------===//
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// Construction methods.
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//===--------------------------------------------------------------------===//
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static MachineOperand CreateImm(int64_t Val) {
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MachineOperand Op(MachineOperand::MO_Immediate);
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Op.setImm(Val);
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return Op;
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}
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static MachineOperand CreateFPImm(const ConstantFP *CFP) {
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MachineOperand Op(MachineOperand::MO_FPImmediate);
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Op.Contents.CFP = CFP;
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return Op;
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}
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static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
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bool isKill = false, bool isDead = false,
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unsigned SubReg = 0,
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bool isEarlyClobber = false) {
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MachineOperand Op(MachineOperand::MO_Register);
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Op.IsDef = isDef;
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Op.IsImp = isImp;
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Op.IsKill = isKill;
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Op.IsDead = isDead;
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Op.IsEarlyClobber = isEarlyClobber;
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Op.Contents.Reg.RegNo = Reg;
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Op.Contents.Reg.Prev = 0;
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Op.Contents.Reg.Next = 0;
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Op.SubReg = SubReg;
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return Op;
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}
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static MachineOperand CreateMBB(MachineBasicBlock *MBB) {
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MachineOperand Op(MachineOperand::MO_MachineBasicBlock);
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Op.setMBB(MBB);
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return Op;
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}
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static MachineOperand CreateFI(unsigned Idx) {
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MachineOperand Op(MachineOperand::MO_FrameIndex);
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Op.setIndex(Idx);
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return Op;
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}
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static MachineOperand CreateCPI(unsigned Idx, int Offset) {
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MachineOperand Op(MachineOperand::MO_ConstantPoolIndex);
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Op.setIndex(Idx);
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Op.setOffset(Offset);
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return Op;
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}
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static MachineOperand CreateJTI(unsigned Idx) {
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MachineOperand Op(MachineOperand::MO_JumpTableIndex);
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Op.setIndex(Idx);
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return Op;
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}
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static MachineOperand CreateGA(GlobalValue *GV, int Offset) {
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MachineOperand Op(MachineOperand::MO_GlobalAddress);
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Op.Contents.OffsetedInfo.Val.GV = GV;
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Op.setOffset(Offset);
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return Op;
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}
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static MachineOperand CreateES(const char *SymName, int Offset = 0) {
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MachineOperand Op(MachineOperand::MO_ExternalSymbol);
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Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
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Op.setOffset(Offset);
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return Op;
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}
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const MachineOperand &operator=(const MachineOperand &MO) {
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OpKind = MO.OpKind;
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IsDef = MO.IsDef;
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IsImp = MO.IsImp;
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IsKill = MO.IsKill;
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IsDead = MO.IsDead;
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IsEarlyClobber = MO.IsEarlyClobber;
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SubReg = MO.SubReg;
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ParentMI = MO.ParentMI;
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Contents = MO.Contents;
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return *this;
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}
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friend class MachineInstr;
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friend class MachineRegisterInfo;
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private:
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//===--------------------------------------------------------------------===//
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// Methods for handling register use/def lists.
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//===--------------------------------------------------------------------===//
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/// isOnRegUseList - Return true if this operand is on a register use/def list
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/// or false if not. This can only be called for register operands that are
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/// part of a machine instruction.
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bool isOnRegUseList() const {
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assert(isRegister() && "Can only add reg operand to use lists");
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return Contents.Reg.Prev != 0;
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}
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/// AddRegOperandToRegInfo - Add this register operand to the specified
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/// MachineRegisterInfo. If it is null, then the next/prev fields should be
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/// explicitly nulled out.
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void AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo);
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void RemoveRegOperandFromRegInfo() {
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assert(isOnRegUseList() && "Reg operand is not on a use list");
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// Unlink this from the doubly linked list of operands.
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MachineOperand *NextOp = Contents.Reg.Next;
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*Contents.Reg.Prev = NextOp;
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if (NextOp) {
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assert(NextOp->getReg() == getReg() && "Corrupt reg use/def chain!");
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NextOp->Contents.Reg.Prev = Contents.Reg.Prev;
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}
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Contents.Reg.Prev = 0;
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Contents.Reg.Next = 0;
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}
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};
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inline std::ostream &operator<<(std::ostream &OS, const MachineOperand &MO) {
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MO.print(OS, 0);
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return OS;
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}
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inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) {
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MO.print(OS, 0);
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return OS;
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}
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} // End llvm namespace
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#endif
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