llvm-6502/test/CodeGen
Evan Cheng bfe8afaaec After r147827 and r147902, it's now possible for unallocatable registers to be
live across BBs before register allocation. This miscompiled 197.parser
when a cmp + b are optimized to a cbnz instruction even though the CPSR def
is live-in a successor.
        cbnz    r6, LBB89_12
...
LBB89_12:
        ble     LBB89_1

The fix consists of two parts. 1) Teach LiveVariables that some unallocatable
registers might be liveouts so don't mark their last use as kill if they are.
2) ARM constantpool island pass shouldn't form cbz / cbnz if the conditional
branch does not kill CPSR.

rdar://10676853


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148168 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-14 01:53:46 +00:00
..
ARM test/CodeGen/ARM/test-sharedidx.ll: Fix for -Asserts. 2012-01-13 07:03:55 +00:00
CBackend
CellSPU
CPP
Generic Manually upgrade the test suite to specify the flag to cttz and ctlz. 2011-12-12 11:59:10 +00:00
Hexagon Hexagon: Fix a nasty order-of-initialization bug. 2011-12-16 19:08:59 +00:00
MBlaze
Mips Have getRegForInlineAsmConstraint return the correct register class when target 2012-01-04 02:45:01 +00:00
MSP430
PowerPC Cleanup stack/frame register define/kill states. This fixes two bugs: 2011-12-30 00:34:00 +00:00
PTX
SPARC
Thumb Fix more places which should be checking for iOS, not darwin. 2012-01-04 01:55:04 +00:00
Thumb2 After r147827 and r147902, it's now possible for unallocatable registers to be 2012-01-14 01:53:46 +00:00
X86 Cleanup test case by adding checks for test names. 2012-01-14 01:46:51 +00:00
XCore FileCheck hygiene. 2012-01-05 00:43:34 +00:00