llvm-6502/test/MC
Daniel Sanders 7b91359226 [mips] Merge disassemblers into a single implementation.
Summary:
Currently we have Mips32 and Mips64 disassemblers and this causes the target
triple to affect the disassembly despite all the relevant information being in
the ELF header. These implementations do not need to be separate.

This patch merges them together such that the appropriate tables are checked
for the subtarget (e.g. Mips64 is checked when GP64 is enabled).

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7498

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228825 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-11 11:28:56 +00:00
..
AArch64
ARM [ARM] Add armv6s[-]m as an alias to armv6[-]m 2015-02-10 15:15:08 +00:00
AsmParser
COFF MC: Calculate intra-section symbol differences correctly for COFF 2015-02-09 06:31:31 +00:00
Disassembler [mips] Merge disassemblers into a single implementation. 2015-02-11 11:28:56 +00:00
ELF
Hexagon
MachO
Markup
Mips [mips][microMIPS] Implement movep instruction 2015-02-10 16:36:20 +00:00
PowerPC [PowerPC] Support the (old) cntlz instruction alias 2015-02-10 18:45:02 +00:00
R600
Sparc
SystemZ
X86 [X86] Add GETSEC instruction. 2015-02-07 23:36:36 +00:00