mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-25 00:29:20 +00:00
Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150226 91177308-0d34-0410-b5e6-96231b3b80d8
109 lines
3.0 KiB
C++
109 lines
3.0 KiB
C++
//===-- TargetMachine.cpp - General Target Information ---------------------==//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file describes the general parts of a Target machine.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#include "llvm/MC/MCAsmInfo.h"
|
|
#include "llvm/Target/TargetMachine.h"
|
|
#include "llvm/Target/TargetOptions.h"
|
|
#include "llvm/Support/CommandLine.h"
|
|
using namespace llvm;
|
|
|
|
//---------------------------------------------------------------------------
|
|
// Command-line options that tend to be useful on more than one back-end.
|
|
//
|
|
|
|
namespace llvm {
|
|
bool HasDivModLibcall;
|
|
bool AsmVerbosityDefault(false);
|
|
}
|
|
|
|
static cl::opt<bool>
|
|
DataSections("fdata-sections",
|
|
cl::desc("Emit data into separate sections"),
|
|
cl::init(false));
|
|
static cl::opt<bool>
|
|
FunctionSections("ffunction-sections",
|
|
cl::desc("Emit functions into separate sections"),
|
|
cl::init(false));
|
|
|
|
//---------------------------------------------------------------------------
|
|
// TargetMachine Class
|
|
//
|
|
|
|
TargetMachine::TargetMachine(const Target &T,
|
|
StringRef TT, StringRef CPU, StringRef FS,
|
|
const TargetOptions &Options)
|
|
: TheTarget(T), TargetTriple(TT), TargetCPU(CPU), TargetFS(FS),
|
|
CodeGenInfo(0), AsmInfo(0),
|
|
MCRelaxAll(false),
|
|
MCNoExecStack(false),
|
|
MCSaveTempLabels(false),
|
|
MCUseLoc(true),
|
|
MCUseCFI(true),
|
|
MCUseDwarfDirectory(false),
|
|
Options(Options) {
|
|
}
|
|
|
|
TargetMachine::~TargetMachine() {
|
|
delete CodeGenInfo;
|
|
delete AsmInfo;
|
|
}
|
|
|
|
/// getRelocationModel - Returns the code generation relocation model. The
|
|
/// choices are static, PIC, and dynamic-no-pic, and target default.
|
|
Reloc::Model TargetMachine::getRelocationModel() const {
|
|
if (!CodeGenInfo)
|
|
return Reloc::Default;
|
|
return CodeGenInfo->getRelocationModel();
|
|
}
|
|
|
|
/// getCodeModel - Returns the code model. The choices are small, kernel,
|
|
/// medium, large, and target default.
|
|
CodeModel::Model TargetMachine::getCodeModel() const {
|
|
if (!CodeGenInfo)
|
|
return CodeModel::Default;
|
|
return CodeGenInfo->getCodeModel();
|
|
}
|
|
|
|
/// getOptLevel - Returns the optimization level: None, Less,
|
|
/// Default, or Aggressive.
|
|
CodeGenOpt::Level TargetMachine::getOptLevel() const {
|
|
if (!CodeGenInfo)
|
|
return CodeGenOpt::Default;
|
|
return CodeGenInfo->getOptLevel();
|
|
}
|
|
|
|
bool TargetMachine::getAsmVerbosityDefault() {
|
|
return AsmVerbosityDefault;
|
|
}
|
|
|
|
void TargetMachine::setAsmVerbosityDefault(bool V) {
|
|
AsmVerbosityDefault = V;
|
|
}
|
|
|
|
bool TargetMachine::getFunctionSections() {
|
|
return FunctionSections;
|
|
}
|
|
|
|
bool TargetMachine::getDataSections() {
|
|
return DataSections;
|
|
}
|
|
|
|
void TargetMachine::setFunctionSections(bool V) {
|
|
FunctionSections = V;
|
|
}
|
|
|
|
void TargetMachine::setDataSections(bool V) {
|
|
DataSections = V;
|
|
}
|
|
|