Chris Lattner c01d1232fe * Rename X86::IMULr16 -> X86::IMULrr16 ... * Implement R1 = R2 * C where R1 and R2 are 32 or 16 bits. This avoids an extra copy into a register, reducing register pressure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9278 91177308-0d34-0410-b5e6-96231b3b80d8		2003-10-20 03:42:58 +00:00
..
CBackend	Add support for the new varargs intrinsics and instructions	2003-10-18 05:57:43 +00:00
SparcV9	Change the Opcode enum for PHI nodes from "Instruction::PHINode" to "Instruction::PHI" to be more consistent with the other instructions.	2003-10-19 21:34:28 +00:00
X86	* Rename X86::IMULr16 -> X86::IMULrr16	2003-10-20 03:42:58 +00:00
Makefile	X86 target builds fine now	2002-11-20 20:17:03 +00:00
MRegisterInfo.cpp	Make it easier to debug by exposing a temporary	2003-08-03 13:49:25 +00:00
Target.td	Add a bunch of new node types, including a new Void dummy register class	2003-08-15 04:35:14 +00:00
TargetData.cpp	Add support for 'any' pointer size and endianness	2003-08-24 13:49:22 +00:00
TargetInstrInfo.cpp	Nice tasty llc fixes. These should fix LLC for x86 for everything in	2003-06-27 00:00:48 +00:00
TargetMachine.cpp	The promotion rules are the same for all targets, they are set by the C standard.	2003-04-26 19:47:36 +00:00
TargetSchedInfo.cpp	Reformatted code to match the prevalent LLVM style; fit code into 80 columns.	2003-08-05 00:02:06 +00:00