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https://github.com/c64scene-ar/llvm-6502.git
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7bc59bc395
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28301 91177308-0d34-0410-b5e6-96231b3b80d8
92 lines
3.0 KiB
C++
92 lines
3.0 KiB
C++
//===- ARMRegisterInfo.cpp - ARM Register Information -----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the "Instituto Nokia de Tecnologia" and
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// is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the ARM implementation of the MRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#include "ARM.h"
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#include "ARMRegisterInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineLocation.h"
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#include "llvm/Type.h"
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#include "llvm/ADT/STLExtras.h"
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#include <iostream>
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using namespace llvm;
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ARMRegisterInfo::ARMRegisterInfo()
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: ARMGenRegisterInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP) {
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}
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void ARMRegisterInfo::
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storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned SrcReg, int FI,
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const TargetRegisterClass *RC) const {
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// On the order of operands here: think "[FI + 0] = SrcReg".
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assert (RC == ARM::IntRegsRegisterClass);
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BuildMI(MBB, I, ARM::str, 3).addFrameIndex(FI).addImm(0).addReg(SrcReg);
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}
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void ARMRegisterInfo::
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loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned DestReg, int FI,
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const TargetRegisterClass *RC) const {
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assert (RC == ARM::IntRegsRegisterClass);
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BuildMI(MBB, I, ARM::ldr, 2, DestReg).addFrameIndex(FI).addImm(0);
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}
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void ARMRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const {
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assert (RC == ARM::IntRegsRegisterClass);
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BuildMI(MBB, I, ARM::mov, 1, DestReg).addReg(SrcReg);
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}
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MachineInstr *ARMRegisterInfo::foldMemoryOperand(MachineInstr* MI,
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unsigned OpNum,
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int FI) const {
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return NULL;
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}
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void ARMRegisterInfo::
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eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const {
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MBB.erase(I);
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}
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void
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ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
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assert(0 && "Not Implemented");
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}
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void ARMRegisterInfo::
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processFunctionBeforeFrameFinalized(MachineFunction &MF) const {}
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void ARMRegisterInfo::emitPrologue(MachineFunction &MF) const {
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}
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void ARMRegisterInfo::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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}
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unsigned ARMRegisterInfo::getRARegister() const {
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return ARM::R14;
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}
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unsigned ARMRegisterInfo::getFrameRegister(MachineFunction &MF) const {
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return ARM::R13;
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}
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#include "ARMGenRegisterInfo.inc"
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