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https://github.com/c64scene-ar/llvm-6502.git
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ed788b6283
ARM FastISel is currently only enabled for iOS non-Thumb1, and I'm working on enabling it for other targets. As a first step I've fixed some of the tests. Changes to ARM FastISel tests: - Different triples don't generate the same relocations (especially movw/movt versus constant pool loads). Use a regex to allow either. - Mangling is different. Use a regex to allow either. - The reserved registers are sometimes different, so registers get allocated in a different order. Capture the names only where this occurs. - Add -verify-machineinstrs to some tests where it works. It doesn't work everywhere it should yet. - Add -fast-isel-abort to many tests that didn't have it before. - Split out the VarArg test from fast-isel-call.ll into its own test. This simplifies test setup because of --check-prefix. Patch by JF Bastien git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181801 91177308-0d34-0410-b5e6-96231b3b80d8
49 lines
1.5 KiB
LLVM
49 lines
1.5 KiB
LLVM
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
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define i32 @t1(i32 %a, i32 %b) nounwind uwtable ssp {
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entry:
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; THUMB: t1:
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; ARM: t1:
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%x = add i32 %a, %b
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br i1 1, label %if.then, label %if.else
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; THUMB-NOT: b {{\.?}}LBB0_1
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; ARM-NOT: b {{\.?}}LBB0_1
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if.then: ; preds = %entry
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call void @foo1()
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br label %if.end7
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if.else: ; preds = %entry
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br i1 0, label %if.then2, label %if.else3
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; THUMB: b {{\.?}}LBB0_4
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; ARM: b {{\.?}}LBB0_4
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if.then2: ; preds = %if.else
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call void @foo2()
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br label %if.end6
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if.else3: ; preds = %if.else
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%y = sub i32 %a, %b
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br i1 1, label %if.then5, label %if.end
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; THUMB-NOT: b {{\.?}}LBB0_5
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; ARM-NOT: b {{\.?}}LBB0_5
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if.then5: ; preds = %if.else3
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call void @foo1()
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br label %if.end
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if.end: ; preds = %if.then5, %if.else3
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br label %if.end6
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if.end6: ; preds = %if.end, %if.then2
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br label %if.end7
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if.end7: ; preds = %if.end6, %if.then
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ret i32 0
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}
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declare void @foo1()
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declare void @foo2()
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