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c0b9dc5be7
ilist of MachineInstr objects. This allows constant time removal and insertion of MachineInstr instances from anywhere in each MachineBasicBlock. It also allows for constant time splicing of MachineInstrs into or out of MachineBasicBlocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11340 91177308-0d34-0410-b5e6-96231b3b80d8
282 lines
10 KiB
C++
282 lines
10 KiB
C++
//===- X86RegisterInfo.cpp - X86 Register Information -----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the X86 implementation of the MRegisterInfo class. This
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// file is responsible for the frame pointer elimination optimization on X86.
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//
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//===----------------------------------------------------------------------===//
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#include "X86.h"
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#include "X86RegisterInfo.h"
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#include "X86InstrBuilder.h"
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#include "llvm/Constants.h"
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#include "llvm/Type.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetFrameInfo.h"
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#include "Support/CommandLine.h"
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namespace llvm {
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namespace {
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cl::opt<bool>
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NoFPElim("disable-fp-elim",
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cl::desc("Disable frame pointer elimination optimization"));
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}
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X86RegisterInfo::X86RegisterInfo()
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: X86GenRegisterInfo(X86::ADJCALLSTACKDOWN, X86::ADJCALLSTACKUP) {}
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static unsigned getIdx(const TargetRegisterClass *RC) {
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switch (RC->getSize()) {
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default: assert(0 && "Invalid data size!");
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case 1: return 0;
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case 2: return 1;
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case 4: return 2;
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case 10: return 3;
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}
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}
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int X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineInstr* MI,
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unsigned SrcReg, int FrameIdx,
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const TargetRegisterClass *RC) const {
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static const unsigned Opcode[] =
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{ X86::MOVrm8, X86::MOVrm16, X86::MOVrm32, X86::FSTPr80 };
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MachineInstr *I = addFrameReference(BuildMI(Opcode[getIdx(RC)], 5),
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FrameIdx).addReg(SrcReg);
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MBB.insert(MI, I);
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return 1;
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}
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int X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineInstr* MI,
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unsigned DestReg, int FrameIdx,
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const TargetRegisterClass *RC) const{
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static const unsigned Opcode[] =
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{ X86::MOVmr8, X86::MOVmr16, X86::MOVmr32, X86::FLDr80 };
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unsigned OC = Opcode[getIdx(RC)];
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MBB.insert(MI, addFrameReference(BuildMI(OC, 4, DestReg), FrameIdx));
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return 1;
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}
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int X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineInstr* MI,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const {
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static const unsigned Opcode[] =
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{ X86::MOVrr8, X86::MOVrr16, X86::MOVrr32, X86::FpMOV };
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MBB.insert(MI, BuildMI(Opcode[getIdx(RC)],1,DestReg).addReg(SrcReg));
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return 1;
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}
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//===----------------------------------------------------------------------===//
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// Stack Frame Processing methods
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//===----------------------------------------------------------------------===//
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// hasFP - Return true if the specified function should have a dedicated frame
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// pointer register. This is true if the function has variable sized allocas or
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// if frame pointer elimination is disabled.
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//
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static bool hasFP(MachineFunction &MF) {
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return NoFPElim || MF.getFrameInfo()->hasVarSizedObjects();
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}
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int X86RegisterInfo::eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineInstr* I) const {
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MachineInstr *New = 0, *Old = I;
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if (hasFP(MF)) {
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// If we have a frame pointer, turn the adjcallstackup instruction into a
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// 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
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// <amt>'
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unsigned Amount = Old->getOperand(0).getImmedValue();
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if (Amount != 0) {
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// We need to keep the stack aligned properly. To do this, we round the
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// amount of space needed for the outgoing arguments up to the next
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// alignment boundary.
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unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
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Amount = (Amount+Align-1)/Align*Align;
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if (Old->getOpcode() == X86::ADJCALLSTACKDOWN) {
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New=BuildMI(X86::SUBri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(Amount);
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} else {
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assert(Old->getOpcode() == X86::ADJCALLSTACKUP);
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New=BuildMI(X86::ADDri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(Amount);
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}
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}
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}
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if (New) {
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// Replace the pseudo instruction with a new instruction...
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MBB.insert(MBB.erase(I), New);
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return 0;
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} else {
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MBB.erase(I);
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return -1;
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}
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}
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int X86RegisterInfo::eliminateFrameIndex(MachineFunction &MF,
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MachineInstr* II) const {
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unsigned i = 0;
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MachineInstr &MI = *II;
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while (!MI.getOperand(i).isFrameIndex()) {
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++i;
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assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
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}
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int FrameIndex = MI.getOperand(i).getFrameIndex();
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// This must be part of a four operand memory reference. Replace the
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// FrameIndex with base register with EBP. Add add an offset to the offset.
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MI.SetMachineOperandReg(i, hasFP(MF) ? X86::EBP : X86::ESP);
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// Now add the frame object offset to the offset from EBP.
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int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
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MI.getOperand(i+3).getImmedValue()+4;
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if (!hasFP(MF))
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Offset += MF.getFrameInfo()->getStackSize();
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MI.SetMachineOperandConst(i+3, MachineOperand::MO_SignExtendedImmed, Offset);
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return 0;
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}
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int X86RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF)
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const {
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if (hasFP(MF)) {
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// Create a frame entry for the EBP register that must be saved.
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int FrameIdx = MF.getFrameInfo()->CreateStackObject(4, 4);
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assert(FrameIdx == MF.getFrameInfo()->getObjectIndexEnd()-1 &&
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"Slot for EBP register must be last in order to be found!");
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}
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return 0;
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}
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int X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
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MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
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MachineBasicBlock::iterator MBBI = MBB.begin();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MachineInstr *MI;
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unsigned oldSize = MBB.size();
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// Get the number of bytes to allocate from the FrameInfo
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unsigned NumBytes = MFI->getStackSize();
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if (hasFP(MF)) {
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// Get the offset of the stack slot for the EBP register... which is
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// guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
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int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4;
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if (NumBytes) { // adjust stack pointer: ESP -= numbytes
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MI= BuildMI(X86::SUBri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(NumBytes);
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MBB.insert(MBBI, MI);
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}
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// Save EBP into the appropriate stack slot...
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MI = addRegOffset(BuildMI(X86::MOVrm32, 5), // mov [ESP-<offset>], EBP
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X86::ESP, EBPOffset+NumBytes).addReg(X86::EBP);
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MBB.insert(MBBI, MI);
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// Update EBP with the new base value...
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if (NumBytes == 0) // mov EBP, ESP
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MI = BuildMI(X86::MOVrr32, 2, X86::EBP).addReg(X86::ESP);
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else // lea EBP, [ESP+StackSize]
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MI = addRegOffset(BuildMI(X86::LEAr32, 5, X86::EBP), X86::ESP, NumBytes);
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MBB.insert(MBBI, MI);
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} else {
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// When we have no frame pointer, we reserve argument space for call sites
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// in the function immediately on entry to the current function. This
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// eliminates the need for add/sub ESP brackets around call sites.
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//
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NumBytes += MFI->getMaxCallFrameSize();
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// Round the size to a multiple of the alignment (don't forget the 4 byte
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// offset though).
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unsigned Align = MF.getTarget().getFrameInfo().getStackAlignment();
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NumBytes = ((NumBytes+4)+Align-1)/Align*Align - 4;
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// Update frame info to pretend that this is part of the stack...
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MFI->setStackSize(NumBytes);
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if (NumBytes) {
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// adjust stack pointer: ESP -= numbytes
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MI= BuildMI(X86::SUBri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(NumBytes);
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MBB.insert(MBBI, MI);
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}
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}
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return MBB.size() - oldSize;
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}
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int X86RegisterInfo::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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unsigned oldSize = MBB.size();
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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MachineBasicBlock::iterator MBBI = MBB.end(); --MBBI;
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MachineInstr *MI;
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assert(MBBI->getOpcode() == X86::RET &&
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"Can only insert epilog into returning blocks");
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if (hasFP(MF)) {
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// Get the offset of the stack slot for the EBP register... which is
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// guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
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int EBPOffset = MFI->getObjectOffset(MFI->getObjectIndexEnd()-1)+4;
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// mov ESP, EBP
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MI = BuildMI(X86::MOVrr32, 1,X86::ESP).addReg(X86::EBP);
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MBB.insert(MBBI, MI);
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// mov EBP, [ESP-<offset>]
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MI = addRegOffset(BuildMI(X86::MOVmr32, 5, X86::EBP), X86::ESP, EBPOffset);
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MBB.insert(MBBI, MI);
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} else {
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// Get the number of bytes allocated from the FrameInfo...
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unsigned NumBytes = MFI->getStackSize();
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if (NumBytes) { // adjust stack pointer back: ESP += numbytes
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MI =BuildMI(X86::ADDri32, 1, X86::ESP, MOTy::UseAndDef).addZImm(NumBytes);
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MBB.insert(MBBI, MI);
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}
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}
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return MBB.size() - oldSize;
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}
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} // End llvm namespace
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#include "X86GenRegisterInfo.inc"
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namespace llvm {
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const TargetRegisterClass*
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X86RegisterInfo::getRegClassForType(const Type* Ty) const {
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switch (Ty->getPrimitiveID()) {
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case Type::LongTyID:
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case Type::ULongTyID: assert(0 && "Long values can't fit in registers!");
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default: assert(0 && "Invalid type to getClass!");
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case Type::BoolTyID:
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case Type::SByteTyID:
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case Type::UByteTyID: return &R8Instance;
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case Type::ShortTyID:
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case Type::UShortTyID: return &R16Instance;
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case Type::IntTyID:
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case Type::UIntTyID:
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case Type::PointerTyID: return &R32Instance;
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case Type::FloatTyID:
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case Type::DoubleTyID: return &RFPInstance;
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}
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}
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} // End llvm namespace
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