llvm-6502/include/llvm/Target
Ahmed Bougacha ec35069525 [CodeGen] Add hook/combine to form vector extloads, enabled on X86.
The combine that forms extloads used to be disabled on vector types,
because "None of the supported targets knows how to perform load and
sign extend on vectors in one instruction."

That's not entirely true, since at least SSE4.1 X86 knows how to do
those sextloads/zextloads (with PMOVS/ZX).
But there are several aspects to getting this right.
First, vector extloads are controlled by a profitability callback.
For instance, on ARM, several instructions have folded extload forms,
so it's not always beneficial to create an extload node (and trying to
match extloads is a whole 'nother can of worms).

The interesting optimization enables folding of s/zextloads to illegal
(splittable) vector types, expanding them into smaller legal extloads.

It's not ideal (it introduces some legalization-like behavior in the
combine) but it's better than the obvious alternative: form illegal
extloads, and later try to split them up.  If you do that, you might
generate extloads that can't be split up, but have a valid ext+load
expansion.  At vector-op legalization time, it's too late to generate
this kind of code, so you end up forced to scalarize. It's better to
just avoid creating egregiously illegal nodes.

This optimization is enabled unconditionally on X86.

Note that the splitting combine is happy with "custom" extloads. As
is, this bypasses the actual custom lowering, and just unrolls the
extload. But from what I've seen, this is still much better than the
current custom lowering, which does some kind of unrolling at the end
anyway (see for instance load_sext_4i8_to_4i64 on SSE2, and the added
FIXME).

Also note that the existing combine that forms extloads is now also
enabled on legal vectors.  This doesn't have a big effect on X86
(because sext+load is usually combined to sext_inreg+aextload).
On ARM it fires on some rare occasions; that's for a separate commit.

Differential Revision: http://reviews.llvm.org/D6904


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228325 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-05 18:31:02 +00:00
..
CostTable.h
Target.td Add the llvm.frameallocate and llvm.recoverframeallocation intrinsics 2015-01-13 00:48:10 +00:00
TargetCallingConv.h
TargetCallingConv.td [mips] Remove MipsCC::analyzeCallOperands in favour of CCState::AnalyzeCallOperands. NFC 2014-11-07 11:43:49 +00:00
TargetFrameLowering.h [X86] Convert esp-relative movs of function arguments to pushes, step 2 2015-02-01 16:56:04 +00:00
TargetInstrInfo.h [cleanup] Re-sort all the #include lines in LLVM using 2015-01-14 11:23:27 +00:00
TargetIntrinsicInfo.h
TargetItinerary.td
TargetLowering.h [CodeGen] Add hook/combine to form vector extloads, enabled on X86. 2015-02-05 18:31:02 +00:00
TargetLoweringObjectFile.h Recommit r224935 with a fix for the ObjC++/AArch64 bug that that revision 2015-01-09 18:55:42 +00:00
TargetMachine.h [multiversion] Switch all of the targets over to use the 2015-02-01 13:20:00 +00:00
TargetOpcodes.h Add the llvm.frameallocate and llvm.recoverframeallocation intrinsics 2015-01-13 00:48:10 +00:00
TargetOptions.h Revert "Insert random noops to increase security against ROP attacks (llvm)" 2015-01-14 05:24:33 +00:00
TargetRegisterInfo.h [StackMaps] Allow the target to pre-process the live-out mask 2015-01-13 17:47:59 +00:00
TargetSchedule.td
TargetSelectionDAG.td Add addrspacecast node to tablegen 2015-02-05 03:35:34 +00:00
TargetSelectionDAGInfo.h Remove unnecessary forward declaration. 2015-02-02 17:38:40 +00:00
TargetSubtargetInfo.h Move DataLayout back to the TargetMachine from TargetSubtargetInfo 2015-01-26 19:03:15 +00:00