mirror of
https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4930 91177308-0d34-0410-b5e6-96231b3b80d8
278 lines
9.2 KiB
C++
278 lines
9.2 KiB
C++
//===-- RegAllocSimple.cpp - A simple generic register allocator --- ------===//
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//
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// This file implements a simple register allocator. *Very* simple.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Function.h"
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#include "llvm/iTerminators.h"
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#include "llvm/Type.h"
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#include "llvm/Constants.h"
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#include "llvm/Pass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/Target/MachineInstrInfo.h"
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#include "llvm/Target/MRegisterInfo.h"
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#include "llvm/Target/MachineRegInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/InstVisitor.h"
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#include "Support/Statistic.h"
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#include <map>
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namespace {
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struct RegAllocSimple : public FunctionPass {
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TargetMachine &TM;
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MachineBasicBlock *CurrMBB;
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MachineFunction *MF;
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unsigned maxOffset;
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const MRegisterInfo *RegInfo;
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unsigned NumBytesAllocated, ByteAlignment;
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// Maps SSA Regs => offsets on the stack where these values are stored
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// FIXME: change name to VirtReg2OffsetMap
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std::map<unsigned, unsigned> RegMap;
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// Maps SSA Regs => physical regs
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std::map<unsigned, unsigned> SSA2PhysRegMap;
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// Maps physical register to their register classes
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std::map<unsigned, const TargetRegisterClass*> PhysReg2RegClassMap;
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// Maps RegClass => which index we can take a register from. Since this is a
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// simple register allocator, when we need a register of a certain class, we
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// just take the next available one.
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std::map<unsigned, unsigned> RegsUsed;
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std::map<const TargetRegisterClass*, unsigned> RegClassIdx;
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RegAllocSimple(TargetMachine &tm) : TM(tm), CurrMBB(0), maxOffset(0),
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RegInfo(tm.getRegisterInfo()),
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NumBytesAllocated(0), ByteAlignment(4)
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{
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// build reverse mapping for physReg -> register class
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RegInfo->buildReg2RegClassMap(PhysReg2RegClassMap);
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RegsUsed[RegInfo->getFramePointer()] = 1;
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RegsUsed[RegInfo->getStackPointer()] = 1;
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}
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bool isAvailableReg(unsigned Reg) {
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// assert(Reg < MRegisterInfo::FirstVirtualReg && "...");
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return RegsUsed.find(Reg) == RegsUsed.end();
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}
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///
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unsigned allocateStackSpaceFor(unsigned VirtReg,
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const TargetRegisterClass *regClass);
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/// Given size (in bytes), returns a register that is currently unused
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/// Side effect: marks that register as being used until manually cleared
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unsigned getFreeReg(unsigned virtualReg);
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/// Returns all `borrowed' registers back to the free pool
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void clearAllRegs() {
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RegClassIdx.clear();
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}
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void cleanupAfterFunction() {
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RegMap.clear();
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SSA2PhysRegMap.clear();
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NumBytesAllocated = 0;
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}
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/// Moves value from memory into that register
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MachineBasicBlock::iterator
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moveUseToReg (MachineBasicBlock::iterator I, unsigned VirtReg,
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unsigned &PhysReg);
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/// Saves reg value on the stack (maps virtual register to stack value)
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MachineBasicBlock::iterator
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saveVirtRegToStack (MachineBasicBlock::iterator I, unsigned VirtReg,
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unsigned PhysReg);
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MachineBasicBlock::iterator
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savePhysRegToStack (MachineBasicBlock::iterator I, unsigned PhysReg);
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/// runOnFunction - Top level implementation of instruction selection for
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/// the entire function.
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///
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bool runOnMachineFunction(MachineFunction &Fn);
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bool runOnFunction(Function &Fn) {
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return runOnMachineFunction(MachineFunction::get(&Fn));
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}
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};
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}
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unsigned RegAllocSimple::allocateStackSpaceFor(unsigned VirtReg,
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const TargetRegisterClass *regClass)
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{
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if (RegMap.find(VirtReg) == RegMap.end()) {
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unsigned size = regClass->getDataSize();
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unsigned over = NumBytesAllocated - (NumBytesAllocated % ByteAlignment);
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if (size >= ByteAlignment - over) {
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// need to pad by (ByteAlignment - over)
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NumBytesAllocated += ByteAlignment - over;
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}
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RegMap[VirtReg] = NumBytesAllocated;
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NumBytesAllocated += size;
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}
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return RegMap[VirtReg];
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}
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unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
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const TargetRegisterClass* regClass = MF->getRegClass(virtualReg);
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unsigned physReg;
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assert(regClass);
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if (RegClassIdx.find(regClass) != RegClassIdx.end()) {
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unsigned regIdx = RegClassIdx[regClass]++;
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assert(regIdx < regClass->getNumRegs() && "Not enough registers!");
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physReg = regClass->getRegister(regIdx);
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} else {
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physReg = regClass->getRegister(0);
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// assert(physReg < regClass->getNumRegs() && "No registers in class!");
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RegClassIdx[regClass] = 1;
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}
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if (isAvailableReg(physReg))
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return physReg;
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else {
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return getFreeReg(virtualReg);
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}
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}
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MachineBasicBlock::iterator
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RegAllocSimple::moveUseToReg (MachineBasicBlock::iterator I,
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unsigned VirtReg, unsigned &PhysReg)
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{
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const TargetRegisterClass* regClass = MF->getRegClass(VirtReg);
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assert(regClass);
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unsigned stackOffset = allocateStackSpaceFor(VirtReg, regClass);
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PhysReg = getFreeReg(VirtReg);
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// FIXME: increment the frame pointer
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// Add move instruction(s)
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return RegInfo->loadRegOffset2Reg(CurrMBB, I, PhysReg,
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RegInfo->getFramePointer(),
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-stackOffset, regClass->getDataSize());
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}
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MachineBasicBlock::iterator
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RegAllocSimple::saveVirtRegToStack (MachineBasicBlock::iterator I,
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unsigned VirtReg, unsigned PhysReg)
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{
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const TargetRegisterClass* regClass = MF->getRegClass(VirtReg);
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assert(regClass);
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unsigned stackOffset = allocateStackSpaceFor(VirtReg, regClass);
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// Add move instruction(s)
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return RegInfo->storeReg2RegOffset(CurrMBB, I, PhysReg,
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RegInfo->getFramePointer(),
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-stackOffset, regClass->getDataSize());
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}
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MachineBasicBlock::iterator
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RegAllocSimple::savePhysRegToStack (MachineBasicBlock::iterator I,
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unsigned PhysReg)
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{
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const TargetRegisterClass* regClass = MF->getRegClass(PhysReg);
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assert(regClass);
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unsigned offset = allocateStackSpaceFor(PhysReg, regClass);
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// Add move instruction(s)
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return RegInfo->storeReg2RegOffset(CurrMBB, I, PhysReg,
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RegInfo->getFramePointer(),
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offset, regClass->getDataSize());
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}
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bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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cleanupAfterFunction();
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unsigned virtualReg, physReg;
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DEBUG(std::cerr << "Machine Function " << "\n");
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MF = &Fn;
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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MBB != MBBe; ++MBB)
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{
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CurrMBB = &(*MBB);
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//loop over each basic block
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for (MachineBasicBlock::iterator I = MBB->begin(); I != MBB->end(); ++I)
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{
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MachineInstr *MI = *I;
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DEBUG(std::cerr << "instr: ";
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MI->print(std::cerr, TM));
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// FIXME: add a preliminary pass that will invalidate any registers that
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// are used by the instruction (including implicit uses)
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// Loop over each instruction:
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// uses, move from memory into registers
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for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
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MachineOperand &op = MI->getOperand(i);
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if (op.getType() == MachineOperand::MO_SignExtendedImmed ||
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op.getType() == MachineOperand::MO_UnextendedImmed)
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{
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DEBUG(std::cerr << "const\n");
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} else if (op.isVirtualRegister()) {
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virtualReg = (unsigned) op.getAllocatedRegNum();
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// save register to stack if it's a def
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DEBUG(std::cerr << "op: " << op << "\n");
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DEBUG(std::cerr << "\t inst[" << i << "]: ";
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MI->print(std::cerr, TM));
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if (op.opIsDef()) {
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physReg = getFreeReg(virtualReg);
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MachineBasicBlock::iterator J = I;
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J = saveVirtRegToStack(++J, virtualReg, physReg);
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I = --J;
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} else {
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I = moveUseToReg(I, virtualReg, physReg);
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}
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MI->SetMachineOperandReg(i, physReg);
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DEBUG(std::cerr << "virt: " << virtualReg <<
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", phys: " << op.getAllocatedRegNum() << "\n");
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}
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}
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clearAllRegs();
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}
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}
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// add prologue we should preserve callee-save registers...
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MachineFunction::iterator Fi = Fn.begin();
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MachineBasicBlock *MBB = Fi;
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MachineBasicBlock::iterator MBBi = MBB->begin();
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RegInfo->emitPrologue(MBB, MBBi, NumBytesAllocated);
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// add epilogue to restore the callee-save registers
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// loop over the basic block
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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MBB != MBBe; ++MBB)
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{
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// check if last instruction is a RET
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MachineBasicBlock::iterator I = (*MBB).end();
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MachineInstr *MI = *(--I);
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const MachineInstrInfo &MII = TM.getInstrInfo();
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if (MII.isReturn(MI->getOpcode())) {
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// this block has a return instruction, add epilogue
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RegInfo->emitEpilogue(MBB, I, NumBytesAllocated);
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}
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}
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return false; // We never modify the LLVM itself.
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}
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Pass *createSimpleX86RegisterAllocator(TargetMachine &TM) {
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return new RegAllocSimple(TM);
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}
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