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c1c9bc1df7
Add getFPUFeatures to TargetParser, which gets the list of subtarget features that are enabled/disabled for each FPU, and use it when handling the .fpu directive. No functional change in this commit, though clang will start behaving differently once it starts using this. Differential Revision: http://reviews.llvm.org/D10237 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239150 91177308-0d34-0410-b5e6-96231b3b80d8
127 lines
4.3 KiB
C++
127 lines
4.3 KiB
C++
//===-- MCSubtargetInfo.cpp - Subtarget Information -----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/MC/MCInstrItineraries.h"
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#include "llvm/MC/SubtargetFeature.h"
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#include "llvm/Support/raw_ostream.h"
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#include <algorithm>
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using namespace llvm;
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/// InitMCProcessorInfo - Set or change the CPU (optionally supplemented
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/// with feature string). Recompute feature bits and scheduling model.
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void
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MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) {
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SubtargetFeatures Features(FS);
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FeatureBits = Features.getFeatureBits(CPU, ProcDesc, ProcFeatures);
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InitCPUSchedModel(CPU);
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}
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void
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MCSubtargetInfo::InitCPUSchedModel(StringRef CPU) {
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if (!CPU.empty())
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CPUSchedModel = getSchedModelForCPU(CPU);
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else
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CPUSchedModel = MCSchedModel::GetDefaultSchedModel();
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}
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void
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MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef C, StringRef FS,
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ArrayRef<SubtargetFeatureKV> PF,
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ArrayRef<SubtargetFeatureKV> PD,
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const SubtargetInfoKV *ProcSched,
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const MCWriteProcResEntry *WPR,
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const MCWriteLatencyEntry *WL,
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const MCReadAdvanceEntry *RA,
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const InstrStage *IS,
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const unsigned *OC,
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const unsigned *FP) {
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TargetTriple = TT;
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CPU = C;
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ProcFeatures = PF;
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ProcDesc = PD;
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ProcSchedModels = ProcSched;
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WriteProcResTable = WPR;
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WriteLatencyTable = WL;
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ReadAdvanceTable = RA;
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Stages = IS;
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OperandCycles = OC;
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ForwardingPaths = FP;
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InitMCProcessorInfo(CPU, FS);
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}
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/// ToggleFeature - Toggle a feature and returns the re-computed feature
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/// bits. This version does not change the implied bits.
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FeatureBitset MCSubtargetInfo::ToggleFeature(uint64_t FB) {
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FeatureBits.flip(FB);
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return FeatureBits;
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}
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FeatureBitset MCSubtargetInfo::ToggleFeature(const FeatureBitset &FB) {
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FeatureBits ^= FB;
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return FeatureBits;
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}
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/// ToggleFeature - Toggle a feature and returns the re-computed feature
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/// bits. This version will also change all implied bits.
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FeatureBitset MCSubtargetInfo::ToggleFeature(StringRef FS) {
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SubtargetFeatures Features;
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FeatureBits = Features.ToggleFeature(FeatureBits, FS, ProcFeatures);
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return FeatureBits;
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}
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FeatureBitset MCSubtargetInfo::ApplyFeatureFlag(StringRef FS) {
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SubtargetFeatures Features;
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FeatureBits = Features.ApplyFeatureFlag(FeatureBits, FS, ProcFeatures);
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return FeatureBits;
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}
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MCSchedModel
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MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
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assert(ProcSchedModels && "Processor machine model not available!");
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unsigned NumProcs = ProcDesc.size();
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#ifndef NDEBUG
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for (size_t i = 1; i < NumProcs; i++) {
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assert(strcmp(ProcSchedModels[i - 1].Key, ProcSchedModels[i].Key) < 0 &&
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"Processor machine model table is not sorted");
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}
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#endif
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// Find entry
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const SubtargetInfoKV *Found =
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std::lower_bound(ProcSchedModels, ProcSchedModels+NumProcs, CPU);
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if (Found == ProcSchedModels+NumProcs || StringRef(Found->Key) != CPU) {
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if (CPU != "help") // Don't error if the user asked for help.
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errs() << "'" << CPU
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<< "' is not a recognized processor for this target"
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<< " (ignoring processor)\n";
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return MCSchedModel::GetDefaultSchedModel();
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}
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assert(Found->Value && "Missing processor SchedModel value");
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return *(const MCSchedModel *)Found->Value;
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}
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InstrItineraryData
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MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
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const MCSchedModel SchedModel = getSchedModelForCPU(CPU);
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return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths);
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}
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/// Initialize an InstrItineraryData instance.
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void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const {
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InstrItins =
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InstrItineraryData(CPUSchedModel, Stages, OperandCycles, ForwardingPaths);
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}
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