llvm-6502/test/CodeGen
Ulrich Weigand fdb6eb65c7 [PowerPC] Fix on-stack AltiVec arguments with 64-bit SVR4
Current 64-bit SVR4 code seems to have some remnants of Darwin code
in AltiVec argument handing.  This had the effect that AltiVec arguments
(or subsequent arguments) were not correctly placed in the parameter area
in some cases.

The correct behaviour with the 64-bit SVR4 ABI is:
- All AltiVec arguments take up space in the parameter area, just like
  any other arguments, whether vararg or not.
- They are always 16-byte aligned, skipping a parameter area doubleword
  (and the associated GPR, if any), if necessary.

This patch implements the correct behaviour and adds a test case.
(Verified against GCC behaviour via the ABI compat test suite.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211492 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-23 12:36:34 +00:00
..
AArch64
ARM Move test so that it is skipped if the ARM target is not enabled. 2014-06-20 15:30:38 +00:00
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC [PowerPC] Fix on-stack AltiVec arguments with 64-bit SVR4 2014-06-23 12:36:34 +00:00
R600 R600: Add udivrem test 2014-06-22 21:42:58 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86 Revert r211399, "Generate native unwind info on Win64" 2014-06-22 22:00:56 +00:00
XCore