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49683f3c96
The new target machines are: nvptx (old ptx32) => 32-bit PTX nvptx64 (old ptx64) => 64-bit PTX The sources are based on the internal NVIDIA NVPTX back-end, and contain more functionality than the current PTX back-end currently provides. NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156196 91177308-0d34-0410-b5e6-96231b3b80d8
95 lines
2.9 KiB
C++
95 lines
2.9 KiB
C++
//===- NVPTXRegisterInfo.h - NVPTX Register Information Impl ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the NVPTX implementation of the TargetRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef NVPTXREGISTERINFO_H
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#define NVPTXREGISTERINFO_H
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#include "ManagedStringPool.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#define GET_REGINFO_HEADER
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#include "NVPTXGenRegisterInfo.inc"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include <sstream>
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namespace llvm {
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// Forward Declarations.
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class TargetInstrInfo;
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class NVPTXSubtarget;
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class NVPTXRegisterInfo : public NVPTXGenRegisterInfo {
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private:
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const TargetInstrInfo &TII;
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const NVPTXSubtarget &ST;
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bool Is64Bit;
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// Hold Strings that can be free'd all together with NVPTXRegisterInfo
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ManagedStringPool ManagedStrPool;
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public:
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NVPTXRegisterInfo(const TargetInstrInfo &tii,
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const NVPTXSubtarget &st);
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//------------------------------------------------------
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// Pure virtual functions from TargetRegisterInfo
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//------------------------------------------------------
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// NVPTX callee saved registers
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virtual const uint16_t*
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getCalleeSavedRegs(const MachineFunction *MF = 0) const;
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// NVPTX callee saved register classes
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virtual const TargetRegisterClass* const *
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getCalleeSavedRegClasses(const MachineFunction *MF) const;
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virtual BitVector getReservedRegs(const MachineFunction &MF) const;
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virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
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int SPAdj,
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RegScavenger *RS=NULL) const;
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const;
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virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const;
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virtual unsigned getFrameRegister(const MachineFunction &MF) const;
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virtual unsigned getRARegister() const;
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ManagedStringPool *getStrPool() const {
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return const_cast<ManagedStringPool *>(&ManagedStrPool);
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}
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const char *getName(unsigned RegNo) const {
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std::stringstream O;
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O << "reg" << RegNo;
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return getStrPool()->getManagedString(O.str().c_str())->c_str();
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}
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};
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std::string getNVPTXRegClassName (const TargetRegisterClass *RC);
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std::string getNVPTXRegClassStr (const TargetRegisterClass *RC);
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bool isNVPTXVectorRegClass (const TargetRegisterClass *RC);
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std::string getNVPTXElemClassName (const TargetRegisterClass *RC);
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int getNVPTXVectorSize (const TargetRegisterClass *RC);
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const TargetRegisterClass *getNVPTXElemClass(const TargetRegisterClass *RC);
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} // end namespace llvm
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#endif
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