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c19d1c3ba2
consistently by moving it out of lowering into dag combine. Add some missing patterns for matching away extended versions of setcc_c. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122201 91177308-0d34-0410-b5e6-96231b3b80d8
35 lines
879 B
LLVM
35 lines
879 B
LLVM
; RUN: llc < %s -march=x86 | FileCheck %s
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; <rdar://problem/8449754>
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define i32 @test1(i32 %sum, i32 %x) nounwind readnone ssp {
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entry:
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; CHECK: test1:
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; CHECK: sbbl %ecx, %ecx
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; CHECK-NOT: addl
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; CHECK: subl %ecx, %eax
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%add4 = add i32 %x, %sum
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%cmp = icmp ult i32 %add4, %x
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%inc = zext i1 %cmp to i32
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%z.0 = add i32 %add4, %inc
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ret i32 %z.0
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}
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; Instcombine transforms test1 into test2:
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; CHECK: test2:
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; CHECK: movl
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; CHECK-NEXT: addl
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; CHECK-NEXT: sbbl
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; CHECK-NEXT: subl
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; CHECK-NEXT: ret
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define i32 @test2(i32 %sum, i32 %x) nounwind readnone ssp {
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entry:
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%uadd = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %x, i32 %sum)
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%0 = extractvalue { i32, i1 } %uadd, 0
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%cmp = extractvalue { i32, i1 } %uadd, 1
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%inc = zext i1 %cmp to i32
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%z.0 = add i32 %0, %inc
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ret i32 %z.0
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}
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declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone
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