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https://github.com/c64scene-ar/llvm-6502.git
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0518fca843
up to r158925 were handled as processor specific. Making them
generic and putting tests for these modifiers in the CodeGen/Generic
directory caused a number of targets to fail.
This commit addresses that problem by having the targets call
the generic routine for generic modifiers that they don't currently
have explicit code for.
For now only generic print operands 'c' and 'n' are supported.vi
Affected files:
test/CodeGen/Generic/asm-large-immediate.ll
lib/Target/PowerPC/PPCAsmPrinter.cpp
lib/Target/NVPTX/NVPTXAsmPrinter.cpp
lib/Target/ARM/ARMAsmPrinter.cpp
lib/Target/XCore/XCoreAsmPrinter.cpp
lib/Target/X86/X86AsmPrinter.cpp
lib/Target/Hexagon/HexagonAsmPrinter.cpp
lib/Target/CellSPU/SPUAsmPrinter.cpp
lib/Target/Sparc/SparcAsmPrinter.cpp
lib/Target/MBlaze/MBlazeAsmPrinter.cpp
lib/Target/Mips/MipsAsmPrinter.cpp
MSP430 isn't represented because it did not even run with
the long existing 'c' modifier and it was not apparent what
needs to be done to get it inline asm ready.
Contributer: Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159203 91177308-0d34-0410-b5e6-96231b3b80d8
315 lines
10 KiB
C++
315 lines
10 KiB
C++
//===-- HexagonAsmPrinter.cpp - Print machine instrs to Hexagon assembly --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to Hexagon assembly language. This printer is
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// the output mechanism used by `llc'.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "asm-printer"
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#include "Hexagon.h"
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#include "HexagonAsmPrinter.h"
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#include "HexagonMachineFunctionInfo.h"
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#include "HexagonMCInst.h"
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#include "HexagonTargetMachine.h"
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#include "HexagonSubtarget.h"
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#include "InstPrinter/HexagonInstPrinter.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Module.h"
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#include "llvm/Analysis/ConstantFolding.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCSection.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Format.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Target/Mangler.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetLoweringObjectFile.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/StringExtras.h"
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using namespace llvm;
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static cl::opt<bool> AlignCalls(
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"hexagon-align-calls", cl::Hidden, cl::init(true),
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cl::desc("Insert falign after call instruction for Hexagon target"));
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void HexagonAsmPrinter::EmitAlignment(unsigned NumBits,
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const GlobalValue *GV) const {
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// For basic block level alignment, use ".falign".
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if (!GV) {
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OutStreamer.EmitRawText(StringRef("\t.falign"));
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return;
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}
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AsmPrinter::EmitAlignment(NumBits, GV);
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}
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void HexagonAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
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raw_ostream &O) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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switch (MO.getType()) {
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default: llvm_unreachable ("<unknown operand type>");
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case MachineOperand::MO_Register:
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O << HexagonInstPrinter::getRegisterName(MO.getReg());
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return;
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case MachineOperand::MO_Immediate:
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O << MO.getImm();
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return;
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case MachineOperand::MO_MachineBasicBlock:
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O << *MO.getMBB()->getSymbol();
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return;
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case MachineOperand::MO_JumpTableIndex:
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O << *GetJTISymbol(MO.getIndex());
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// FIXME: PIC relocation model.
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return;
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case MachineOperand::MO_ConstantPoolIndex:
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O << *GetCPISymbol(MO.getIndex());
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return;
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case MachineOperand::MO_ExternalSymbol:
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O << *GetExternalSymbolSymbol(MO.getSymbolName());
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return;
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case MachineOperand::MO_GlobalAddress:
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// Computing the address of a global symbol, not calling it.
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O << *Mang->getSymbol(MO.getGlobal());
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printOffset(MO.getOffset(), O);
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return;
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}
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}
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//
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// isBlockOnlyReachableByFallthrough - We need to override this since the
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// default AsmPrinter does not print labels for any basic block that
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// is only reachable by a fall through. That works for all cases except
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// for the case in which the basic block is reachable by a fall through but
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// through an indirect from a jump table. In this case, the jump table
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// will contain a label not defined by AsmPrinter.
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//
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bool HexagonAsmPrinter::
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isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const {
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if (MBB->hasAddressTaken()) {
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return false;
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}
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return AsmPrinter::isBlockOnlyReachableByFallthrough(MBB);
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}
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/// PrintAsmOperand - Print out an operand for an inline asm expression.
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///
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bool HexagonAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode,
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raw_ostream &OS) {
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// Does this asm operand have a single letter operand modifier?
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if (ExtraCode && ExtraCode[0]) {
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if (ExtraCode[1] != 0) return true; // Unknown modifier.
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switch (ExtraCode[0]) {
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default:
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// See if this is a generic print operand
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return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, OS);
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case 'c': // Don't print "$" before a global var name or constant.
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// Hexagon never has a prefix.
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printOperand(MI, OpNo, OS);
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return false;
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case 'L': // Write second word of DImode reference.
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// Verify that this operand has two consecutive registers.
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if (!MI->getOperand(OpNo).isReg() ||
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OpNo+1 == MI->getNumOperands() ||
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!MI->getOperand(OpNo+1).isReg())
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return true;
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++OpNo; // Return the high-part.
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break;
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case 'I':
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// Write 'i' if an integer constant, otherwise nothing. Used to print
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// addi vs add, etc.
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if (MI->getOperand(OpNo).isImm())
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OS << "i";
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return false;
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}
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}
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printOperand(MI, OpNo, OS);
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return false;
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}
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bool HexagonAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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unsigned OpNo, unsigned AsmVariant,
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const char *ExtraCode,
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raw_ostream &O) {
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if (ExtraCode && ExtraCode[0])
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return true; // Unknown modifier.
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const MachineOperand &Base = MI->getOperand(OpNo);
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const MachineOperand &Offset = MI->getOperand(OpNo+1);
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if (Base.isReg())
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printOperand(MI, OpNo, O);
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else
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llvm_unreachable("Unimplemented");
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if (Offset.isImm()) {
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if (Offset.getImm())
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O << " + #" << Offset.getImm();
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}
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else
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llvm_unreachable("Unimplemented");
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return false;
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}
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void HexagonAsmPrinter::printPredicateOperand(const MachineInstr *MI,
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unsigned OpNo,
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raw_ostream &O) {
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llvm_unreachable("Unimplemented");
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}
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/// printMachineInstruction -- Print out a single Hexagon MI in Darwin syntax to
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/// the current output stream.
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///
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void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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if (MI->isBundle()) {
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std::vector<const MachineInstr*> BundleMIs;
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const MachineBasicBlock *MBB = MI->getParent();
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MachineBasicBlock::const_instr_iterator MII = MI;
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++MII;
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unsigned int IgnoreCount = 0;
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while (MII != MBB->end() && MII->isInsideBundle()) {
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const MachineInstr *MInst = MII;
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if (MInst->getOpcode() == TargetOpcode::DBG_VALUE ||
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MInst->getOpcode() == TargetOpcode::IMPLICIT_DEF) {
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IgnoreCount++;
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++MII;
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continue;
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}
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//BundleMIs.push_back(&*MII);
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BundleMIs.push_back(MInst);
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++MII;
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}
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unsigned Size = BundleMIs.size();
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assert((Size+IgnoreCount) == MI->getBundleSize() && "Corrupt Bundle!");
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for (unsigned Index = 0; Index < Size; Index++) {
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HexagonMCInst MCI;
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MCI.setStartPacket(Index == 0);
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MCI.setEndPacket(Index == (Size-1));
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HexagonLowerToMC(BundleMIs[Index], MCI, *this);
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OutStreamer.EmitInstruction(MCI);
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}
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}
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else {
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HexagonMCInst MCI;
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if (MI->getOpcode() == Hexagon::ENDLOOP0) {
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MCI.setStartPacket(true);
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MCI.setEndPacket(true);
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}
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HexagonLowerToMC(MI, MCI, *this);
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OutStreamer.EmitInstruction(MCI);
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}
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return;
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}
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/// PrintUnmangledNameSafely - Print out the printable characters in the name.
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/// Don't print things like \n or \0.
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// static void PrintUnmangledNameSafely(const Value *V, raw_ostream &OS) {
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// for (const char *Name = V->getNameStart(), *E = Name+V->getNameLen();
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// Name != E; ++Name)
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// if (isprint(*Name))
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// OS << *Name;
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// }
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void HexagonAsmPrinter::printAddrModeBasePlusOffset(const MachineInstr *MI,
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int OpNo, raw_ostream &O) {
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const MachineOperand &MO1 = MI->getOperand(OpNo);
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const MachineOperand &MO2 = MI->getOperand(OpNo+1);
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O << HexagonInstPrinter::getRegisterName(MO1.getReg())
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<< " + #"
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<< MO2.getImm();
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}
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void HexagonAsmPrinter::printGlobalOperand(const MachineInstr *MI, int OpNo,
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raw_ostream &O) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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assert( (MO.getType() == MachineOperand::MO_GlobalAddress) &&
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"Expecting global address");
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O << *Mang->getSymbol(MO.getGlobal());
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if (MO.getOffset() != 0) {
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O << " + ";
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O << MO.getOffset();
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}
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}
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void HexagonAsmPrinter::printJumpTable(const MachineInstr *MI, int OpNo,
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raw_ostream &O) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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assert( (MO.getType() == MachineOperand::MO_JumpTableIndex) &&
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"Expecting jump table index");
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// Hexagon_TODO: Do we need name mangling?
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O << *GetJTISymbol(MO.getIndex());
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}
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void HexagonAsmPrinter::printConstantPool(const MachineInstr *MI, int OpNo,
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raw_ostream &O) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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assert( (MO.getType() == MachineOperand::MO_ConstantPoolIndex) &&
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"Expecting constant pool index");
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// Hexagon_TODO: Do we need name mangling?
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O << *GetCPISymbol(MO.getIndex());
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}
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static MCInstPrinter *createHexagonMCInstPrinter(const Target &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI) {
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if (SyntaxVariant == 0)
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return(new HexagonInstPrinter(MAI, MII, MRI));
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else
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return NULL;
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}
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extern "C" void LLVMInitializeHexagonAsmPrinter() {
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RegisterAsmPrinter<HexagonAsmPrinter> X(TheHexagonTarget);
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TargetRegistry::RegisterMCInstPrinter(TheHexagonTarget,
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createHexagonMCInstPrinter);
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}
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