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https://github.com/c64scene-ar/llvm-6502.git
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9236362a64
This patch will generate the following for integer ABS: movl %edi, %eax negl %eax cmovll %edi, %eax INSTEAD OF movl %edi, %ecx sarl $31, %ecx leal (%rdi,%rcx), %eax xorl %ecx, %eax There exists a target-independent DAG combine for integer ABS, which converts integer ABS to sar+add+xor. For X86, we match this pattern back to neg+cmov. This is implemented in PerformXorCombine. rdar://10695237 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158175 91177308-0d34-0410-b5e6-96231b3b80d8
21 lines
484 B
LLVM
21 lines
484 B
LLVM
; RUN: llc < %s -march=x86-64 | FileCheck %s
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;; Integer absolute value, should produce something at least as good as:
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;; movl %edi, %eax
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;; negl %eax
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;; cmovll %edi, %eax
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;; ret
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; rdar://10695237
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define i32 @test(i32 %a) nounwind {
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; CHECK: test:
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; CHECK: mov
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; CHECK-NEXT: neg
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; CHECK-NEXT: cmov
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; CHECK-NEXT: ret
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%tmp1neg = sub i32 0, %a
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%b = icmp sgt i32 %a, -1
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%abs = select i1 %b, i32 %a, i32 %tmp1neg
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ret i32 %abs
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}
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