llvm-6502/lib/Target/Mips
Jakob Stoklund Olesen 09bc029865 Replace the tablegen RegisterClass field SubRegClassList with an alist-like data
structure that represents a mapping without any dependencies on SubRegIndex
numbering.

This brings us closer to being able to remove the explicit SubRegIndex
numbering, and it is now possible to specify any mapping without inventing
*_INVALID register classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 21:46:58 +00:00
..
AsmPrinter Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what 2010-05-14 21:14:32 +00:00
TargetInfo
CMakeLists.txt
Makefile
Mips.h
Mips.td
MipsCallingConv.td
MipsDelaySlotFiller.cpp
MipsInstrFormats.td
MipsInstrFPU.td
MipsInstrInfo.cpp
MipsInstrInfo.h
MipsInstrInfo.td
MipsISelDAGToDAG.cpp SubRegIndex'ize Mips 2010-05-24 17:42:58 +00:00
MipsISelLowering.cpp
MipsISelLowering.h
MipsMachineFunction.h
MipsMCAsmInfo.cpp
MipsMCAsmInfo.h
MipsRegisterInfo.cpp Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what 2010-05-14 21:14:32 +00:00
MipsRegisterInfo.h SubRegIndex'ize Mips 2010-05-24 17:42:58 +00:00
MipsRegisterInfo.td Replace the tablegen RegisterClass field SubRegClassList with an alist-like data 2010-05-24 21:46:58 +00:00
MipsSchedule.td
MipsSelectionDAGInfo.cpp Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MipsSelectionDAGInfo.h Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MipsSubtarget.cpp
MipsSubtarget.h
MipsTargetMachine.cpp Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MipsTargetMachine.h Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h