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b3c8547cb8
the MachineInstr ->MCInst lowering process, not in the asmprinter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82388 91177308-0d34-0410-b5e6-96231b3b80d8
100 lines
2.8 KiB
C++
100 lines
2.8 KiB
C++
//===-- X86IntelInstPrinter.h - Convert X86 MCInst to assembly syntax -----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints an X86 MCInst to intel style .s file syntax.
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//
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//===----------------------------------------------------------------------===//
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#ifndef X86_INTEL_INST_PRINTER_H
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#define X86_INTEL_INST_PRINTER_H
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#include "llvm/MC/MCInstPrinter.h"
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#include "llvm/Support/raw_ostream.h"
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namespace llvm {
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class MCOperand;
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class X86IntelInstPrinter : public MCInstPrinter {
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public:
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X86IntelInstPrinter(raw_ostream &O, const MCAsmInfo &MAI)
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: MCInstPrinter(O, MAI) {}
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virtual void printInst(const MCInst *MI);
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// Autogenerated by tblgen.
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void printInstruction(const MCInst *MI);
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static const char *getRegisterName(unsigned RegNo);
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void printOperand(const MCInst *MI, unsigned OpNo,
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const char *Modifier = 0);
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void printMemReference(const MCInst *MI, unsigned Op);
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void printLeaMemReference(const MCInst *MI, unsigned Op);
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void printSSECC(const MCInst *MI, unsigned Op);
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void print_pcrel_imm(const MCInst *MI, unsigned OpNo);
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void printopaquemem(const MCInst *MI, unsigned OpNo) {
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O << "OPAQUE PTR ";
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printMemReference(MI, OpNo);
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}
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void printi8mem(const MCInst *MI, unsigned OpNo) {
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O << "BYTE PTR ";
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printMemReference(MI, OpNo);
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}
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void printi16mem(const MCInst *MI, unsigned OpNo) {
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O << "WORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printi32mem(const MCInst *MI, unsigned OpNo) {
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O << "DWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printi64mem(const MCInst *MI, unsigned OpNo) {
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O << "QWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printi128mem(const MCInst *MI, unsigned OpNo) {
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O << "XMMWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printf32mem(const MCInst *MI, unsigned OpNo) {
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O << "DWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printf64mem(const MCInst *MI, unsigned OpNo) {
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O << "QWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printf80mem(const MCInst *MI, unsigned OpNo) {
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O << "XWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printf128mem(const MCInst *MI, unsigned OpNo) {
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O << "XMMWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printlea32mem(const MCInst *MI, unsigned OpNo) {
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O << "DWORD PTR ";
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printLeaMemReference(MI, OpNo);
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}
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void printlea64mem(const MCInst *MI, unsigned OpNo) {
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O << "QWORD PTR ";
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printLeaMemReference(MI, OpNo);
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}
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void printlea64_32mem(const MCInst *MI, unsigned OpNo) {
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O << "QWORD PTR ";
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printLeaMemReference(MI, OpNo);
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}
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};
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}
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#endif
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