llvm-6502/lib
Jim Grosbach c2723a57f3 Use the appropriate register class for an i32 when adding ARM::LR to the
function live in set. This will give us tGPR for Thumb1 and GPR otherwise,
so the copy will be spillable. rdar://8224931

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 23:50:35 +00:00
..
Analysis Eliminate getCanonicalInductionVariableIncrement's last user and 2010-07-23 21:34:51 +00:00
Archive
AsmParser Make NamedMDNode not be a subclass of Value, and simplify the interface 2010-07-21 23:38:33 +00:00
Bitcode Make NamedMDNode not be a subclass of Value, and simplify the interface 2010-07-21 23:38:33 +00:00
CodeGen Remove too-strict assertion. We may want the vreg copy of the physical register 2010-07-23 23:48:02 +00:00
CompilerDriver Formatting. 2010-07-23 04:19:34 +00:00
ExecutionEngine remove the dwarf sizing stuff which is now dead, it was 2010-07-22 21:20:39 +00:00
Linker Make NamedMDNode not be a subclass of Value, and simplify the interface 2010-07-21 23:38:33 +00:00
MC Initial modifications to MCAssembler and TargetMachine for the MCJIT. 2010-07-22 05:58:53 +00:00
Support Don't pass StringRef by reference. 2010-07-14 22:38:02 +00:00
System Rather than using an ifdef on the target to zero out fields, 2010-07-14 14:32:33 +00:00
Target Use the appropriate register class for an i32 when adding ARM::LR to the 2010-07-23 23:50:35 +00:00
Transforms Speculatively revert 109117 2010-07-22 18:44:00 +00:00
VMCore undo 80 column trespassing I caused 2010-07-22 10:37:47 +00:00
Makefile