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69d39091fe
1. Treat FMOVD as a copy instruction, to help with coallescing in V9 mode 2. When in V9 mode, insert FMOVD instead of FpMOVD instructions, as we don't ever rewrite FpMOVD instructions into FMOVS instructions, thus we just end up with commented out copies! This should fix a bunch of failures in V9 mode on sparc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25961 91177308-0d34-0410-b5e6-96231b3b80d8
69 lines
2.5 KiB
C++
69 lines
2.5 KiB
C++
//===- SparcV8InstrInfo.h - SparcV8 Instruction Information -----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the SparcV8 implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SPARCV8INSTRUCTIONINFO_H
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#define SPARCV8INSTRUCTIONINFO_H
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#include "llvm/Target/TargetInstrInfo.h"
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#include "SparcV8RegisterInfo.h"
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namespace llvm {
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/// V8II - This namespace holds all of the target specific flags that
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/// instruction info tracks.
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///
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namespace V8II {
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enum {
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Pseudo = (1<<0),
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Load = (1<<1),
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Store = (1<<2),
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DelaySlot = (1<<3)
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};
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};
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class SparcV8InstrInfo : public TargetInstrInfo {
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const SparcV8RegisterInfo RI;
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public:
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SparcV8InstrInfo(SparcV8Subtarget &ST);
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/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
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/// such, whenever a client has an instance of instruction info, it should
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/// always be able to get register info as well (through this method).
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///
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virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
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/// Return true if the instruction is a register to register move and
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/// leave the source and dest operands in the passed parameters.
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///
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virtual bool isMoveInstr(const MachineInstr &MI,
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unsigned &SrcReg, unsigned &DstReg) const;
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/// isLoadFromStackSlot - If the specified machine instruction is a direct
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/// load from a stack slot, return the virtual or physical register number of
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/// the destination along with the FrameIndex of the loaded stack slot. If
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/// not, return 0. This predicate must return 0 if the instruction has
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/// any side effects other than loading from the stack slot.
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virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
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/// isStoreToStackSlot - If the specified machine instruction is a direct
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/// store to a stack slot, return the virtual or physical register number of
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/// the source reg along with the FrameIndex of the loaded stack slot. If
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/// not, return 0. This predicate must return 0 if the instruction has
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/// any side effects other than storing to the stack slot.
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virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
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};
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}
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#endif
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