mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-30 21:29:28 +00:00
This is based on the Power7 version, with units added and renamed to match P8. Differential Revision: http://reviews.llvm.org/D6358 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223257 91177308-0d34-0410-b5e6-96231b3b80d8
523 lines
16 KiB
TableGen
523 lines
16 KiB
TableGen
//===-- PPCSchedule.td - PowerPC Scheduling Definitions ----*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Instruction Itinerary classes used for PowerPC
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//
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def IIC_IntSimple : InstrItinClass;
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def IIC_IntGeneral : InstrItinClass;
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def IIC_IntCompare : InstrItinClass;
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def IIC_IntDivD : InstrItinClass;
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def IIC_IntDivW : InstrItinClass;
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def IIC_IntMFFS : InstrItinClass;
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def IIC_IntMFVSCR : InstrItinClass;
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def IIC_IntMTFSB0 : InstrItinClass;
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def IIC_IntMTSRD : InstrItinClass;
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def IIC_IntMulHD : InstrItinClass;
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def IIC_IntMulHW : InstrItinClass;
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def IIC_IntMulHWU : InstrItinClass;
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def IIC_IntMulLI : InstrItinClass;
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def IIC_IntRFID : InstrItinClass;
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def IIC_IntRotateD : InstrItinClass;
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def IIC_IntRotateDI : InstrItinClass;
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def IIC_IntRotate : InstrItinClass;
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def IIC_IntShift : InstrItinClass;
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def IIC_IntTrapD : InstrItinClass;
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def IIC_IntTrapW : InstrItinClass;
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def IIC_BrB : InstrItinClass;
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def IIC_BrCR : InstrItinClass;
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def IIC_BrMCR : InstrItinClass;
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def IIC_BrMCRX : InstrItinClass;
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def IIC_LdStDCBA : InstrItinClass;
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def IIC_LdStDCBF : InstrItinClass;
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def IIC_LdStDCBI : InstrItinClass;
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def IIC_LdStLoad : InstrItinClass;
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def IIC_LdStLoadUpd : InstrItinClass;
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def IIC_LdStLoadUpdX : InstrItinClass;
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def IIC_LdStStore : InstrItinClass;
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def IIC_LdStStoreUpd : InstrItinClass;
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def IIC_LdStDSS : InstrItinClass;
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def IIC_LdStICBI : InstrItinClass;
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def IIC_LdStLD : InstrItinClass;
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def IIC_LdStLDU : InstrItinClass;
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def IIC_LdStLDUX : InstrItinClass;
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def IIC_LdStLDARX : InstrItinClass;
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def IIC_LdStLFD : InstrItinClass;
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def IIC_LdStLFDU : InstrItinClass;
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def IIC_LdStLFDUX : InstrItinClass;
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def IIC_LdStLHA : InstrItinClass;
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def IIC_LdStLHAU : InstrItinClass;
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def IIC_LdStLHAUX : InstrItinClass;
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def IIC_LdStLMW : InstrItinClass;
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def IIC_LdStLVecX : InstrItinClass;
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def IIC_LdStLWA : InstrItinClass;
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def IIC_LdStLWARX : InstrItinClass;
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def IIC_LdStSLBIA : InstrItinClass;
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def IIC_LdStSLBIE : InstrItinClass;
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def IIC_LdStSTD : InstrItinClass;
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def IIC_LdStSTDCX : InstrItinClass;
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def IIC_LdStSTDU : InstrItinClass;
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def IIC_LdStSTDUX : InstrItinClass;
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def IIC_LdStSTFD : InstrItinClass;
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def IIC_LdStSTFDU : InstrItinClass;
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def IIC_LdStSTVEBX : InstrItinClass;
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def IIC_LdStSTWCX : InstrItinClass;
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def IIC_LdStSync : InstrItinClass;
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def IIC_SprISYNC : InstrItinClass;
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def IIC_SprMFSR : InstrItinClass;
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def IIC_SprMTMSR : InstrItinClass;
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def IIC_SprMTSR : InstrItinClass;
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def IIC_SprTLBSYNC : InstrItinClass;
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def IIC_SprMFCR : InstrItinClass;
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def IIC_SprMFCRF : InstrItinClass;
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def IIC_SprMFMSR : InstrItinClass;
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def IIC_SprMFSPR : InstrItinClass;
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def IIC_SprMFTB : InstrItinClass;
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def IIC_SprMTSPR : InstrItinClass;
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def IIC_SprMTSRIN : InstrItinClass;
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def IIC_SprRFI : InstrItinClass;
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def IIC_SprSC : InstrItinClass;
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def IIC_FPGeneral : InstrItinClass;
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def IIC_FPAddSub : InstrItinClass;
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def IIC_FPCompare : InstrItinClass;
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def IIC_FPDivD : InstrItinClass;
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def IIC_FPDivS : InstrItinClass;
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def IIC_FPFused : InstrItinClass;
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def IIC_FPRes : InstrItinClass;
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def IIC_FPSqrtD : InstrItinClass;
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def IIC_FPSqrtS : InstrItinClass;
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def IIC_VecGeneral : InstrItinClass;
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def IIC_VecFP : InstrItinClass;
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def IIC_VecFPCompare : InstrItinClass;
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def IIC_VecComplex : InstrItinClass;
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def IIC_VecPerm : InstrItinClass;
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def IIC_VecFPRound : InstrItinClass;
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def IIC_VecVSL : InstrItinClass;
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def IIC_VecVSR : InstrItinClass;
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def IIC_SprMTMSRD : InstrItinClass;
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def IIC_SprSLIE : InstrItinClass;
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def IIC_SprSLBIE : InstrItinClass;
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def IIC_SprSLBMTE : InstrItinClass;
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def IIC_SprSLBMFEE : InstrItinClass;
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def IIC_SprSLBIA : InstrItinClass;
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def IIC_SprTLBIA : InstrItinClass;
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def IIC_SprTLBIEL : InstrItinClass;
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def IIC_SprTLBIE : InstrItinClass;
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//===----------------------------------------------------------------------===//
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// Processor instruction itineraries.
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include "PPCScheduleG3.td"
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include "PPCSchedule440.td"
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include "PPCScheduleG4.td"
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include "PPCScheduleG4Plus.td"
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include "PPCScheduleG5.td"
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include "PPCScheduleP7.td"
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include "PPCScheduleP8.td"
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include "PPCScheduleA2.td"
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include "PPCScheduleE500mc.td"
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include "PPCScheduleE5500.td"
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//===----------------------------------------------------------------------===//
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// Instruction to itinerary class map - When add new opcodes to the supported
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// set, refer to the following table to determine which itinerary class the
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// opcode belongs.
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//
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// opcode itinerary class
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// ====== ===============
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// add IIC_IntSimple
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// addc IIC_IntGeneral
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// adde IIC_IntGeneral
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// addi IIC_IntSimple
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// addic IIC_IntGeneral
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// addic. IIC_IntGeneral
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// addis IIC_IntSimple
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// addme IIC_IntGeneral
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// addze IIC_IntGeneral
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// and IIC_IntSimple
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// andc IIC_IntSimple
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// andi. IIC_IntGeneral
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// andis. IIC_IntGeneral
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// b IIC_BrB
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// bc IIC_BrB
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// bcctr IIC_BrB
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// bclr IIC_BrB
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// cmp IIC_IntCompare
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// cmpi IIC_IntCompare
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// cmpl IIC_IntCompare
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// cmpli IIC_IntCompare
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// cntlzd IIC_IntRotateD
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// cntlzw IIC_IntGeneral
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// crand IIC_BrCR
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// crandc IIC_BrCR
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// creqv IIC_BrCR
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// crnand IIC_BrCR
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// crnor IIC_BrCR
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// cror IIC_BrCR
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// crorc IIC_BrCR
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// crxor IIC_BrCR
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// dcba IIC_LdStDCBA
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// dcbf IIC_LdStDCBF
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// dcbi IIC_LdStDCBI
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// dcbst IIC_LdStDCBF
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// dcbt IIC_LdStLoad
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// dcbtst IIC_LdStLoad
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// dcbz IIC_LdStDCBF
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// divd IIC_IntDivD
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// divdu IIC_IntDivD
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// divw IIC_IntDivW
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// divwu IIC_IntDivW
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// dss IIC_LdStDSS
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// dst IIC_LdStDSS
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// dstst IIC_LdStDSS
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// eciwx IIC_LdStLoad
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// ecowx IIC_LdStLoad
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// eieio IIC_LdStLoad
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// eqv IIC_IntSimple
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// extsb IIC_IntSimple
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// extsh IIC_IntSimple
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// extsw IIC_IntSimple
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// fabs IIC_FPGeneral
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// fadd IIC_FPAddSub
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// fadds IIC_FPGeneral
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// fcfid IIC_FPGeneral
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// fcmpo IIC_FPCompare
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// fcmpu IIC_FPCompare
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// fctid IIC_FPGeneral
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// fctidz IIC_FPGeneral
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// fctiw IIC_FPGeneral
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// fctiwz IIC_FPGeneral
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// fdiv IIC_FPDivD
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// fdivs IIC_FPDivS
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// fmadd IIC_FPFused
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// fmadds IIC_FPGeneral
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// fmr IIC_FPGeneral
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// fmsub IIC_FPFused
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// fmsubs IIC_FPGeneral
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// fmul IIC_FPFused
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// fmuls IIC_FPGeneral
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// fnabs IIC_FPGeneral
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// fneg IIC_FPGeneral
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// fnmadd IIC_FPFused
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// fnmadds IIC_FPGeneral
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// fnmsub IIC_FPFused
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// fnmsubs IIC_FPGeneral
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// fres IIC_FPRes
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// frsp IIC_FPGeneral
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// frsqrte IIC_FPGeneral
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// fsel IIC_FPGeneral
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// fsqrt IIC_FPSqrtD
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// fsqrts IIC_FPSqrtS
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// fsub IIC_FPAddSub
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// fsubs IIC_FPGeneral
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// icbi IIC_LdStICBI
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// isync IIC_SprISYNC
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// lbz IIC_LdStLoad
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// lbzu IIC_LdStLoadUpd
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// lbzux IIC_LdStLoadUpdX
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// lbzx IIC_LdStLoad
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// ld IIC_LdStLD
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// ldarx IIC_LdStLDARX
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// ldu IIC_LdStLDU
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// ldux IIC_LdStLDUX
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// ldx IIC_LdStLD
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// lfd IIC_LdStLFD
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// lfdu IIC_LdStLFDU
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// lfdux IIC_LdStLFDUX
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// lfdx IIC_LdStLFD
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// lfs IIC_LdStLFD
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// lfsu IIC_LdStLFDU
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// lfsux IIC_LdStLFDUX
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// lfsx IIC_LdStLFD
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// lha IIC_LdStLHA
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// lhau IIC_LdStLHAU
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// lhaux IIC_LdStLHAUX
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// lhax IIC_LdStLHA
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// lhbrx IIC_LdStLoad
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// lhz IIC_LdStLoad
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// lhzu IIC_LdStLoadUpd
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// lhzux IIC_LdStLoadUpdX
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// lhzx IIC_LdStLoad
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// lmw IIC_LdStLMW
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// lswi IIC_LdStLMW
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// lswx IIC_LdStLMW
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// lvebx IIC_LdStLVecX
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// lvehx IIC_LdStLVecX
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// lvewx IIC_LdStLVecX
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// lvsl IIC_LdStLVecX
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// lvsr IIC_LdStLVecX
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// lvx IIC_LdStLVecX
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// lvxl IIC_LdStLVecX
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// lwa IIC_LdStLWA
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// lwarx IIC_LdStLWARX
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// lwaux IIC_LdStLHAUX
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// lwax IIC_LdStLHA
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// lwbrx IIC_LdStLoad
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// lwz IIC_LdStLoad
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// lwzu IIC_LdStLoadUpd
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// lwzux IIC_LdStLoadUpdX
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// lwzx IIC_LdStLoad
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// mcrf IIC_BrMCR
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// mcrfs IIC_FPGeneral
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// mcrxr IIC_BrMCRX
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// mfcr IIC_SprMFCR
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// mffs IIC_IntMFFS
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// mfmsr IIC_SprMFMSR
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// mfspr IIC_SprMFSPR
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// mfsr IIC_SprMFSR
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// mfsrin IIC_SprMFSR
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// mftb IIC_SprMFTB
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// mfvscr IIC_IntMFVSCR
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// mtcrf IIC_BrMCRX
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// mtfsb0 IIC_IntMTFSB0
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// mtfsb1 IIC_IntMTFSB0
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// mtfsf IIC_IntMTFSB0
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// mtfsfi IIC_IntMTFSB0
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// mtmsr IIC_SprMTMSR
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// mtmsrd IIC_LdStLD
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// mtspr IIC_SprMTSPR
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// mtsr IIC_SprMTSR
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// mtsrd IIC_IntMTSRD
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// mtsrdin IIC_IntMTSRD
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// mtsrin IIC_SprMTSRIN
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// mtvscr IIC_IntMFVSCR
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// mulhd IIC_IntMulHD
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// mulhdu IIC_IntMulHD
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// mulhw IIC_IntMulHW
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// mulhwu IIC_IntMulHWU
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// mulld IIC_IntMulHD
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// mulli IIC_IntMulLI
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// mullw IIC_IntMulHW
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// nand IIC_IntSimple
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// neg IIC_IntSimple
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// nor IIC_IntSimple
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// or IIC_IntSimple
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// orc IIC_IntSimple
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// ori IIC_IntSimple
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// oris IIC_IntSimple
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// rfi IIC_SprRFI
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// rfid IIC_IntRFID
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// rldcl IIC_IntRotateD
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// rldcr IIC_IntRotateD
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// rldic IIC_IntRotateDI
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// rldicl IIC_IntRotateDI
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// rldicr IIC_IntRotateDI
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// rldimi IIC_IntRotateDI
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// rlwimi IIC_IntRotate
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// rlwinm IIC_IntGeneral
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// rlwnm IIC_IntGeneral
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// sc IIC_SprSC
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// slbia IIC_LdStSLBIA
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// slbie IIC_LdStSLBIE
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// sld IIC_IntRotateD
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// slw IIC_IntGeneral
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// srad IIC_IntRotateD
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// sradi IIC_IntRotateDI
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// sraw IIC_IntShift
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// srawi IIC_IntShift
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// srd IIC_IntRotateD
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// srw IIC_IntGeneral
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// stb IIC_LdStStore
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// stbu IIC_LdStStoreUpd
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// stbux IIC_LdStStoreUpd
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// stbx IIC_LdStStore
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// std IIC_LdStSTD
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// stdcx. IIC_LdStSTDCX
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// stdu IIC_LdStSTDU
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// stdux IIC_LdStSTDUX
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// stdx IIC_LdStSTD
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// stfd IIC_LdStSTFD
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// stfdu IIC_LdStSTFDU
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// stfdux IIC_LdStSTFDU
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// stfdx IIC_LdStSTFD
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// stfiwx IIC_LdStSTFD
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// stfs IIC_LdStSTFD
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// stfsu IIC_LdStSTFDU
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// stfsux IIC_LdStSTFDU
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// stfsx IIC_LdStSTFD
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// sth IIC_LdStStore
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// sthbrx IIC_LdStStore
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// sthu IIC_LdStStoreUpd
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// sthux IIC_LdStStoreUpd
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// sthx IIC_LdStStore
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// stmw IIC_LdStLMW
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// stswi IIC_LdStLMW
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// stswx IIC_LdStLMW
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// stvebx IIC_LdStSTVEBX
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// stvehx IIC_LdStSTVEBX
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// stvewx IIC_LdStSTVEBX
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// stvx IIC_LdStSTVEBX
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// stvxl IIC_LdStSTVEBX
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// stw IIC_LdStStore
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// stwbrx IIC_LdStStore
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// stwcx. IIC_LdStSTWCX
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// stwu IIC_LdStStoreUpd
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// stwux IIC_LdStStoreUpd
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// stwx IIC_LdStStore
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// subf IIC_IntGeneral
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// subfc IIC_IntGeneral
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// subfe IIC_IntGeneral
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// subfic IIC_IntGeneral
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// subfme IIC_IntGeneral
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// subfze IIC_IntGeneral
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// sync IIC_LdStSync
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// td IIC_IntTrapD
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// tdi IIC_IntTrapD
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// tlbia IIC_LdStSLBIA
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// tlbie IIC_LdStDCBF
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// tlbsync IIC_SprTLBSYNC
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// tw IIC_IntTrapW
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// twi IIC_IntTrapW
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// vaddcuw IIC_VecGeneral
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// vaddfp IIC_VecFP
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// vaddsbs IIC_VecGeneral
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// vaddshs IIC_VecGeneral
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// vaddsws IIC_VecGeneral
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// vaddubm IIC_VecGeneral
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// vaddubs IIC_VecGeneral
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// vadduhm IIC_VecGeneral
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// vadduhs IIC_VecGeneral
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// vadduwm IIC_VecGeneral
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// vadduws IIC_VecGeneral
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// vand IIC_VecGeneral
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// vandc IIC_VecGeneral
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// vavgsb IIC_VecGeneral
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// vavgsh IIC_VecGeneral
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// vavgsw IIC_VecGeneral
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// vavgub IIC_VecGeneral
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// vavguh IIC_VecGeneral
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// vavguw IIC_VecGeneral
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// vcfsx IIC_VecFP
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// vcfux IIC_VecFP
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// vcmpbfp IIC_VecFPCompare
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// vcmpeqfp IIC_VecFPCompare
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// vcmpequb IIC_VecGeneral
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// vcmpequh IIC_VecGeneral
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// vcmpequw IIC_VecGeneral
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// vcmpgefp IIC_VecFPCompare
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// vcmpgtfp IIC_VecFPCompare
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// vcmpgtsb IIC_VecGeneral
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// vcmpgtsh IIC_VecGeneral
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// vcmpgtsw IIC_VecGeneral
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// vcmpgtub IIC_VecGeneral
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// vcmpgtuh IIC_VecGeneral
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// vcmpgtuw IIC_VecGeneral
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// vctsxs IIC_VecFP
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// vctuxs IIC_VecFP
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// vexptefp IIC_VecFP
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// vlogefp IIC_VecFP
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// vmaddfp IIC_VecFP
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// vmaxfp IIC_VecFPCompare
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// vmaxsb IIC_VecGeneral
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// vmaxsh IIC_VecGeneral
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// vmaxsw IIC_VecGeneral
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// vmaxub IIC_VecGeneral
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// vmaxuh IIC_VecGeneral
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// vmaxuw IIC_VecGeneral
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// vmhaddshs IIC_VecComplex
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// vmhraddshs IIC_VecComplex
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// vminfp IIC_VecFPCompare
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// vminsb IIC_VecGeneral
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// vminsh IIC_VecGeneral
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// vminsw IIC_VecGeneral
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// vminub IIC_VecGeneral
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// vminuh IIC_VecGeneral
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// vminuw IIC_VecGeneral
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// vmladduhm IIC_VecComplex
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// vmrghb IIC_VecPerm
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// vmrghh IIC_VecPerm
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// vmrghw IIC_VecPerm
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// vmrglb IIC_VecPerm
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// vmrglh IIC_VecPerm
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// vmrglw IIC_VecPerm
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// vmsubfp IIC_VecFP
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// vmsummbm IIC_VecComplex
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// vmsumshm IIC_VecComplex
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// vmsumshs IIC_VecComplex
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// vmsumubm IIC_VecComplex
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// vmsumuhm IIC_VecComplex
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// vmsumuhs IIC_VecComplex
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// vmulesb IIC_VecComplex
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// vmulesh IIC_VecComplex
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// vmuleub IIC_VecComplex
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// vmuleuh IIC_VecComplex
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// vmulosb IIC_VecComplex
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// vmulosh IIC_VecComplex
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// vmuloub IIC_VecComplex
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// vmulouh IIC_VecComplex
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// vnor IIC_VecGeneral
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// vor IIC_VecGeneral
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// vperm IIC_VecPerm
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// vpkpx IIC_VecPerm
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// vpkshss IIC_VecPerm
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// vpkshus IIC_VecPerm
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// vpkswss IIC_VecPerm
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// vpkswus IIC_VecPerm
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// vpkuhum IIC_VecPerm
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// vpkuhus IIC_VecPerm
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// vpkuwum IIC_VecPerm
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// vpkuwus IIC_VecPerm
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// vrefp IIC_VecFPRound
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// vrfim IIC_VecFPRound
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// vrfin IIC_VecFPRound
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// vrfip IIC_VecFPRound
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// vrfiz IIC_VecFPRound
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// vrlb IIC_VecGeneral
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// vrlh IIC_VecGeneral
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// vrlw IIC_VecGeneral
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// vrsqrtefp IIC_VecFP
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// vsel IIC_VecGeneral
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// vsl IIC_VecVSL
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// vslb IIC_VecGeneral
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// vsldoi IIC_VecPerm
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// vslh IIC_VecGeneral
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// vslo IIC_VecPerm
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// vslw IIC_VecGeneral
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// vspltb IIC_VecPerm
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// vsplth IIC_VecPerm
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// vspltisb IIC_VecPerm
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// vspltish IIC_VecPerm
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// vspltisw IIC_VecPerm
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// vspltw IIC_VecPerm
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// vsr IIC_VecVSR
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// vsrab IIC_VecGeneral
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// vsrah IIC_VecGeneral
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// vsraw IIC_VecGeneral
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// vsrb IIC_VecGeneral
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// vsrh IIC_VecGeneral
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// vsro IIC_VecPerm
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// vsrw IIC_VecGeneral
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// vsubcuw IIC_VecGeneral
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// vsubfp IIC_VecFP
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// vsubsbs IIC_VecGeneral
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// vsubshs IIC_VecGeneral
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// vsubsws IIC_VecGeneral
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// vsububm IIC_VecGeneral
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// vsububs IIC_VecGeneral
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// vsubuhm IIC_VecGeneral
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// vsubuhs IIC_VecGeneral
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// vsubuwm IIC_VecGeneral
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// vsubuws IIC_VecGeneral
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// vsum2sws IIC_VecComplex
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// vsum4sbs IIC_VecComplex
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// vsum4shs IIC_VecComplex
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// vsum4ubs IIC_VecComplex
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// vsumsws IIC_VecComplex
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// vupkhpx IIC_VecPerm
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// vupkhsb IIC_VecPerm
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// vupkhsh IIC_VecPerm
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// vupklpx IIC_VecPerm
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// vupklsb IIC_VecPerm
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// vupklsh IIC_VecPerm
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// vxor IIC_VecGeneral
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// xor IIC_IntSimple
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// xori IIC_IntSimple
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// xoris IIC_IntSimple
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//
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